background image

Low Voltage Detectors(V

DF

=0.9V∼1.5V)

 Series

131

2

The XC61C series are highly precise, low power consumption voltage

detectors, manufactured using CMOS and laser trimming technologies.

Detect voltage is extremely accurate with minimal temperature drift. 

Both CMOS and N-channel open drain output configurations are

available.

■General Description

Highly accurate

: ± 2%

Low power consumption : TYP 0.7 

µA [ V

IN

=1.5V ]

Detect voltage range

: 0.9V ~ 1.5V in 0.1V increments

Operating voltage range : 0.7V ~ 6.0V

Detect voltage temperature characteristics 

: TYP± 100ppm/°C

Output configuration

: N-channel open drain or CMOS

Ultra small package

: SSOT-24 (150mW) super mini-mold

: SOT-23 (150mW) mini-mold

: SOT-89 (500mW) mini-power mold

: TO-92 ( 300mW )

Note : There are no products available with a set-up voltage

accuracy of ± 1%.

GMicroprocessor reset circuitry

GMemory battery back-up circuits

GPower-on reset circuits

GPower failure detection

GSystem battery life and charge voltage monitors

■Features

■Applications

NCMOS 

NHighly Accurate

: ± 2%

NLow Power Consumption : 0.7µA (V

IN

= 1.5V)

NUltra small SSOT-24 (SC-82) Package

0

0.5

1.0

1.5

2.0

2.5

3.0

3.5

0

1

2

3

4

5

6

Ta=85℃

-40℃

25℃

XC61CC0902  (0.9V)

Input Voltage: V

IN

 (V)

Supply Current: I

SS

 (μA)

CMOS Output

N-ch Open Drain Output

R

100k

V

IN

V

OUT

V

SS

V

IN

V

OUT

V

SS

V

IN

V

IN

■Typical Application Circuits

■Typical Performance Characteristic

SUPPLY CURRENT vs. INPUT VOLTAGE

02S_02XC61C(低電圧用)    02.09.12  14:23    ページ  131

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XC61C 

Series

132

2

■Pin Configuration

■Pin Assignment

■Product Classification

GOrdering Information

1

SOT-23

(TOP VIEW)

V

IN

V

SS

V

OUT

1

V

IN

NC

V

SS

V

OUT

SSOT-24(SC-82)

(TOP VIEW)

SOT-89

(TOP VIEW)

V

IN

1

V

SS

V

OUT

PIN

SSOT-24

SOT-23

SOT-89

NAME

2

3

2

V

IN

Supply Voltage Input

4

2

3

V

SS

Ground

1

1

1

V

OUT

Output

3

-

-

-

-

TO-92 (T)

2

3

1

TO-92 (L)

1

2

3

NC

No Connection

FUNCTION

PIN NUMBER

XC61C x x x x x x x

a   b  c d e f

Output Configuration :

Package Type: 

C = CMOS

N = SSOT-24 (SC-82)

N = N-ch open drain

M = SOT-23

Detect Voltage :

P = SOT-89

09 = 0.9V

15 = 1.5V

Output Delay :

Device Orientation :

0 = No delay

R = Embossed Tape ( Right )

L = Embossed Tape ( Left )

Detect Accuracy :

2 = 

 within ± 2.0%

d

e

f

DESCRIPTION

DESIGNATOR

DESCRIPTION

DESIGNATOR

a

b

c

T = TO-92 (Standard)

L = TO-92 (Custom pin Configuration)

H = Paper Type ( TO-92)

B = Bag ( TO-92 )

1

2

3

TO-92 (T Type)

(TOP VIEW)

V

OUT

   

V

IN

    

V

SS

1

2

3

TO-92 (L Type)

(TOP VIEW)

V

IN

 

V

SS

 

V

OUT

02S_02XC61C(低電圧用)    02.09.12  14:23    ページ  132

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XC61C

Series

133

2

■Packaging Information

GSSOT-24 (SC-82)

1.1±0.1

0∼0.1

0.15

(0.95)

1.9±0.2

2.9±0.2

0.2min

2.8±0.2

+0.1

-0.05

0.4

+0.1

-0.05

1.6

+0.2

-0.1

GSOT-23

C

0.10

1.10

1.80

L

y

A

A1

A2

b1

E

He

b

e

D

SIZE mm

MIN

TYP

MAX

A

A1

A2

b

b1

C

D

E

He

e

L

y

0.80

1.10

0.10

0.00

0.80

1.00

0.30

0.25

0.15

0.25

0.35

0.125

0.40

0.075

0.225

2.20

2.00

1.80

1.15

1.25

1.45

2.40

1.50

2.10

1.30

0.30

0.10

02S_02XC61C(低電圧用)    02.09.12  14:23    ページ  133

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XC61C 

Series

134

2

GSOT-89

4.5±0.1

(0.4)

2.5±0.1

0.8

min

4.25max

0.42±0.06

0.4

1.5±0.1

0.47±0.06

1.5±0.1

0.42±0.06

1.5±0.1

1.6

+0.15

-0.2

+0.03

-0.02

GTO-92

3.7±0.3

10.0min

1.6±0.1

0.4±0.05

4.65

0.45±0.1

2.5

+0.4

-0.1

2.5

+0.4

-0.1

+0.35

-0.45

4.8

+0.4

-0.5

02S_02XC61C(低電圧用)    02.09.12  14:23    ページ  134

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XC61C

Series

135

2

■Marking

GSSOT-24, SOT-23, SOT-89

SOT-23

(TOP VIEW)

q w e r

SSOT-24(SC-82)

(TOP VIEW)

q

r

w

SOT-89

(TOP VIEW)

q

w

e

r

q Represents the integer of the Output Voltage and Detect Voltage

CMOS Output (XC61CC series)

N-Channel Open Drain Output (XC61CN series)

VOLTAGE (V)

CMOS

N-ch

CMOS

N-ch

w Represents the decimal number of the Detect Voltage

e Based on internal standards

 

( SSOT-24 excepted )

r Represents the assembly lot no.

 

Based on internal standards

DESIGNATOR

3

8

9

VOLTAGE

q .7

q .3

q .8

q .9

VOLTAGE

q .5

q .6

DESIGNATOR

5

6

7

DESIGNATOR

0

1

q .4

3

4

2

q .0

q .1

q .2

0.w

1.w

0.w

1.w

CONFIGURATION

DESIGNATOR

DESIGNATOR

CONFIGURATION

A

B

VOLTAGE (V)

K

L

GTO-92

2 3 4 5

6 7

1

TO-92(L Type)

(TOP VIEW)

61C

L

2 3 4 5

6 7

1

TO-92(T Type)

(TOP VIEW)

61C

q Represents the output 

  configuration

DESIGNATOR

OUTPUT

CONFIGURATION

C

CMOS

N

N-ch

w Represents the Detect Voltage

0

0.9

1

1.5

DESIGNATOR

VOLTAGE

(V)

9

5

y Represents a least significant 

  digit of the produced year

DESIGNATOR

Produced year

0

2000

1

2001

u Denotes the production lot number

  0 to 9, A to Z repeated(G.I.J.O.Q.W excepted)

DESIGNATOR

DETECT VOLTAGE ACCURACY

2

within 

±2%

t Represents the Detect Voltage Accuracy

r Indicates Delay Time

DESIGNATOR

DELAY TIME

0

No delay

02S_02XC61C(低電圧用)    02.09.12  14:23    ページ  135

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XC61C 

Series

136

2

■Block Diagram

V

IN

Vref

V

SS

V

OUT

V

IN

Vref

V

SS

V

OUT

(1) CMOS Output

(2) N-ch Open Drain Output

Ta = 25

O

C

PARAMETER

SYMBOL

RATINGS

UNITS

Input Voltage

V

IN

9

V

Output Current

I

OUT

50

mA

CMOS 

V

SS

 -0.3 ~ V

IN

 +0.3

N-ch open drain

V

SS

 -0.3 ~ 9

SSOT-24

SOT-23

150

TO-92

300

SOT-89

500

Operating Ambient Temperature

Topr

-40 

~

 +85

O

C

Storage Temperature

Tstg

-40 

~

 +125

O

C

Pd

Power Dissipation

mW

V

V

OUT

Output Voltage

150

■Absolute Maximum Ratings

02S_02XC61C(低電圧用)    02.09.12  14:23    ページ  136

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XC61C

Series

137

2

V

DF

 (T) = 0.9 to 1.5V 

± 2%

Ta = 25

O

C

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

CIRCUIT

Detect Voltage

V

DF

V

DF

V

DF

V

DF

V

x 0.98

x 1.02

Hysteresis Range

V

HYS

V

DF

V

DF

V

DF

V

x 0.02

x 0.05

x 0.08

V

IN

 = 1.5V

=2.0V

=3.0V

=4.0V

=5.0V

  N-ch                                  V

DS

=0.5V

V

IN

=0.7V

=1.0V

  P-ch                                  V

DS

=2.1V

V

IN

=6.0V

0.7

2.3

0.8

2.7

Supply Current

I

SS

0.9

3.0

µA

2

1

1

1.0

3.2

1.1

3.6

Operating Voltage

V

IN

V

DF

(T) = 0.9V to 1.5V

0.7

6.0

V

1

0.1

0.8

3

0.85

2.7

mA

-7.5

-1.5

4

 ( with CMOS output )

 

∆  V

DF

-40

O

≤  Topr  ≤   85

O

C

± 100

ppm/

°C

-

  

∆  Topr 

 V

DF

Delay Time

tDLY

0.2

ms

5

(V

DR

    V

OUT

 inversion)

Note :

V

DF

 (T) : Established Detect Voltage Value

Release Voltage : V

DR

 = V

DF

 + V

HYS

Output Current

I

OUT

Temperature Characteristics

■Electrical Characteristics

02S_02XC61C(低電圧用)    02.09.12  14:23    ページ  137

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XC61C 

Series

138

2

■Functional Description

GFunctional Description ( CMOS output )

INPUT VOLTAGE (V

IN

)

MIN. OPERATING VOLTAGE(V

MIN

)

DETECT RELEASE VOLTAGE(V

DR

)

DETECT VOLTAGE(V

DF

)

OUTPUT VOLTAGE (V

OUT

)

GROUND VOLTAGE(V

SS

)

GROUND VOLTAGE (V

SS

)

e

w

q

r

t

y

■Timing Chart

q  When input voltage (V

IN

) rises above detect voltage (V

DF

), output voltage (V

OUT

) will be equal to V

IN

( A condition of high impedance exists with  N-ch open drain output configurations. )

w  When input voltage (V

IN

) falls below detect voltage (V

DF

), output voltage (V

OUT

) will be equal to the ground voltage (V

SS

level.

e  When input voltage (V

IN

) falls to a level below that of the minimum operating voltage (V

MIN

), output will become unstable. 

In this condition, V

IN

 will equal the pulled-up output ( should output be pulled-up.) 

r  When input voltage (V

IN

) rises above the ground voltage (V

SS

) level, output will be unstable at levels below the minimum 

operating voltage (V

MIN

). Between the V

MIN

 and detect release voltage (V

DR

) levels, the ground voltage (V

SS

) level will be 

maintained.

t  When input voltage (V

IN

) rises above detect release voltage (V

DR

), output voltage (V

OUT

) will be equal to V

IN

( A condition of high impedance exists with N-ch open drain output configurations. )

y  The difference between V

DR

 and V

DF

 represents the hysteresis range.

GTiming Chart

02S_02XC61C(低電圧用)    02.09.12  14:23    ページ  138

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XC61C

Series

139

2

■Directions for use

GNotes on Use

1. Please use this IC within the stated maximum ratings.  Operation beyond these limits may cause degrading or 

permanent damage to the device.

2. When a resistor is connected between the V

IN

 pin and the input with CMOS output configurations, oscillation may 

occur as a result of voltage drops at R

IN

 if load current (I

OUT

) exists. ( refer to the Oscillation Description (1) below )

3. When a resistor is connected between the V

IN

 pin and the input with CMOS output configurations, irrespective of 

N-ch output configurations, oscillation may occur as a result of through current at the time of voltage release even 

if load current (I

OUT

) does not exist. ( refer to the Oscillation Description (2) below )

4. With a resistor connected between the V

IN

 pin and the input, detect and release voltage will rise as a result of the 

IC's supply current flowing through the V

IN

 pin.

5. In order to stabilise the IC's operations, please ensure that V

IN

 pin's input frequency's rise and fall times are more 

than several μ sec / V.

6. Please use N-ch open drains configuration, when a resistor R

IN

 is connected between the V

IN

 pin and power 

source. 

In such cases, please ensure that R

IN

 is less than 10kΩ and that C is more than 0.1μF.

Diagram: Circuit using an input resistor

V

OUT

V

IN

XC61CN Series

R

IN

C

V

SS

Diagram 2: Oscillation in relation to through current

XC61CN Series

IN

R

IN

I

SS

*

(Includes Current)

XC61CC Series

Voltage Drop

R

IN 

 x  I

SS

V

IN

V

OUT

V

SS

Diagram 1: Oscillation in relation to output current

XC61CC Series

I

OUT

IN

R

IN

R

L

Voltage Drop

V

IN

V

OUT

V

SS

R

IN  x  

I

OUT

(1) Output current oscillation with the CMOS output configuration

 When the voltage applied at IN rises, release operations commence and the detector's output voltage increases. 

Load current (I

OUT

) will flow at R

L

. Because a voltage drop ( R

IN

 x I

OUT

) is produced at the R

IN

 resistor, located 

between the input (IN) and the V

IN

 pin, the load current will flow via the IC's V

IN

 pin. The voltage drop will also lead 

to a fall in the voltage level at the V

IN

 pin. When the V

IN

 pin voltage level falls below the detect voltage level, detect 

operations will commence. Following detect operations, load current flow will cease and since voltage drop at R

IN

 

will disappear, the voltage level at the V

IN

 pin will rise and release operations will begin over again. 

   Oscillation may occur with this " release - detect - release " repetition. 

Further, this condition will also appear via means of a similar mechanism during detect operations.

(2) Oscillation as a result of through current

Since the XC61C series are CMOS IC 

S

, through current will flow when the IC's internal circuit switching operates 

( during release and detect operations ). Consequently, oscillation is liable to occur as a result of drops in voltage 

at the through current's resistor (R

IN

) during release voltage operations. ( refer to diagram 2 )

Since hysteresis exists during detect operations, oscillation is unlikely to occur.

GOscillation Description

02S_02XC61C(低電圧用)    02.09.12  14:23    ページ  139

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XC61C 

Series

140

2

■Measuring Circuits

V

IN

V

IN

V

OUT

V

SS

A

V

IN

V

OUT

V

SS

R

measurement of

waveform

100kΩ

(Note 1)

V

IN

V

OUT

V

SS

V

DS

V

IN

A

V

IN

V

OUT

V

SS

V

DS

V

IN

A

V

IN

R

100kΩ

(Note 1)

V

V

V

IN

V

OUT

V

SS

Circuit 1

Circuit 3

Circuit 4

Circuit 5

Circuit 2

Note 1 : Not necessary with CMOS output products.

02S_02XC61C(低電圧用)    02.09.12  14:23    ページ  140

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XC61C

Series

141

2

■Typical Performance Characteristics

0

0.5

1.0

1.5

2.0

2.5

3.0

3.5

0

1

2

3

4

5

6

Ta=85℃

-40℃

25℃

0

0.5

1.0

1.5

2.0

2.5

3.0

3.5

0

1

2

3

4

5

6

Ta=85℃

-40℃

25℃

0

0.5

1.0

1.5

2.0

2.5

3.0

3.5

0

1

2

3

4

5

6

25℃

Ta=85℃

-40℃

XC61CC0902  (0.9V)

XC61CC1102  (1.1V)

Input Voltage: V

IN

 (V)

Input Voltage: V

IN

 (V)

Supply Current

: I

SS

 (μA)

Supply Current: I

SS

 (μA)

XC61CC1502  (1.5V)

Supply Current

: I

SS

 (μA)

Input Voltage: V

IN

 (V)

(1)  SUPPLY CURRENT  vs.  INPUT VOLTAGE

(2)  DETECT, RELEASE VOLTAGE  vs.  AMBIENT TEMPERATURE

0.80

0.85

0.90

0.95

1.00

-50

-25

0

25

50

75

100

1.00

1.05

1.10

1.15

1.20

-50

-25

0

25

50

75

100

1.40

1.45

1.50

1.55

1.60

-50

-25

0

25

50

75

100

V

DR

V

DF 

XC61CC0902  (0.9V)

XC61CC1102  (1.1V)

Ambient Temp.: Ta (℃) 

Ambient Temp.: Ta (℃) 

Ambient Temp.: Ta (℃) 

Detect, Release Voltage: V

DF

,V

DR

 (V)

XC61CC1502  (1.5V)

Detect, Release Voltage: V

DF

,V

DR

 (V)

V

DR

V

DF

V

DR

V

DF

Detect, Release Voltage: V

DF

,V

DR

 (V)

(3)  OUTPUT VOLTAGE vs. INPUT VOLTAGE

0

0.2

0.4

0.6

0.8

1.0

1.2

0

0.2

0.4

0.6

0.8

1.0

1.2

Input Voltage: V

IN

 (V)

Ta=25℃

0

0.2

0.4

0.6

0.8

1.0

1.2

1.4

0

0.2

0.4

0.6

0.8

1.0

1.2

1.4

Input Voltage: V

IN

 (V)

Ta=25℃

0

0.5

1.0

1.5

2.0

0

0.5

1.0

1.5

2.0

Input Voltage: V

IN

 (V)

Ta=25℃

Note : The N-channel open drain pull up resistance value is 100kΩ

XC61CN0902  (0.9V)

XC61CN1102  (1.1V)

XC61CN1502  (1.5V)

Output Voltage: V

OUT

 (V)

Output Voltage: V

OUT

 (V)

Output Voltage: V

OUT

 (V)

02S_02XC61C(低電圧用)    02.09.12  14:23    ページ  141

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XC61C 

Series

142

2

(4) N-ch DRIVER OUTPUT CURRENT vs. V

DS

0

0.2

0.4

0.6

0.8

1.0

1.2

1.4

0

0.2

0.4

0.6

0.8

1.0

V

DS

 (V)

0.7V

V

IN

 =0.8V

Ta=25℃

0

0.5

1.0

1.5

2.0

2.5

3.0

0

0.2

0.4

0.6

0.8

1.0

V

DS

 (V)

V

IN

 =1.0V

Ta=25℃

0

0.2

0.4

0.6

0.8

1.0

1.2

1.4

0

0.2

0.4

0.6

0.8

1.0

V

DS

 (V)

0.7V

V

IN

 =0.8V

Ta=25℃

0

2.0

4.0

6.0

8.0

0

0.2

0.4

0.6

0.8

1.0

1.2

1.4

V

DS

 (V)

V

IN

 =1.4V

Ta=25℃

1.2V

1.0V

XC61CC0902  (0.9V)

Output Current: I

OUT

 (mA)

Output Current: I

OUT

 (mA)

Output Current: I

OUT

 (mA)

Output Current: I

OUT

 (mA)

XC61CC1102  (1.1V)

XC61CC1502  (1.5V)

XC61CC1502  (1.5V)

(5) N-ch DRIVER OUTPUT CURRENT vs. INPUT VOLTAGE

0

0.5

1.0

1.5

2.0

2.5

0

0.2

0.4

0.6

0.8

1.0

V

DS

=0.5V

Ta=85℃

-40℃

25℃

0

1.0

2.0

3.0

4.0

5.0

0

0.2

0.4

0.6

0.8

1.0

1.2

V

DS

=0.5V

Ta=-40℃

80℃

25℃

0

2

4

6

8

10

0

0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6

V

DS

=0.5V

Ta=-40℃

85℃

25℃

XC61CC0902  (0.9V)

XC61CC1102  (1.1V)

XC61CC1502  (1.5V)

Output Current: I

OUT

 (mA)

Output Current: I

OUT

 (mA)

Output Current: I

OUT

 (mA)

Input Voltage: V

IN

 

(V) 

Input Voltage: V

IN

 (V)

Input Voltage: V

IN

 (V)

(6) P-ch DRIVER OUTPUT CURRENT vs. INPUT VOLTAGE

0

2

4

6

8

10

12

0

1

2

3

4

5

6

V

DS

=2.1V

0.5V

Ta= 25℃

1.5V

1.0V

0

2

4

6

8

10

12

0

1

2

3

4

5

6

V

DS

=2.1V

0.5V

Ta= 25℃

1.5V

1.0V

0

2

4

6

8

10

12

0

1

2

3

4

5

6

V

DS

=2.1V

0.5V

Ta= 25℃

1.5V

1.0V

XC61CC0902  (0.9V)

XC61CC1102 (1.1V)

Input Voltage: V

IN

 (V) 

Input Voltage: V

IN

 (V) 

Input Voltage: V

IN

 (V) 

Output Current: I

OUT

 (mA)

Output Current: I

OUT

 (mA)

Output Current: I

OUT

 (mA)

XC61CC1502  (1.5V)

0

0.2

0.4

0.6

0.8

1.0

1.2

1.4

0

0.2

0.4

0.6

0.8

1.0

V

DS

 (V)

0.7V

V

IN

 =0.8V

Ta=25℃

Output Current: I

OUT

 (mA)

XC61CC1102  (1.1V)

02S_02XC61C(低電圧用)    02.09.12  14:23    ページ  142