background image

DATA  SHEET

Product specification

File under Integrated Circuits, IC12

2000 Nov 22

INTEGRATED CIRCUITS

PCF8812

65

×

 102 pixels matrix LCD driver

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2000 Nov 22

2

Philips Semiconductors

Product specification

65

×

 102 pixels matrix LCD driver

PCF8812

CONTENTS

1

FEATURES

2

APPLICATIONS

3

GENERAL DESCRIPTION

4

ORDERING INFORMATION

5

BLOCK DIAGRAM

6

PINNING

7

PIN FUNCTIONS

7.1

Pin functions

7.1.1

ROW 0 to ROW 64 row driver outputs

7.1.2

COL 0 to COL 101 column driver outputs

7.1.3

V

SS1

and V

SS2

: negative power supply rails

7.1.4

V

DD1

 to V

DD3

: positive power supply rails

7.1.5

V

LCDIN

: LCD power supply

7.1.6

V

LCDOUT

: LCD power supply

7.1.7

V

LCDSENSE

: voltage multiplier regulation input

(V

LCD

)

7.1.8

T1 to T5: test pads

7.1.9

SDIN: serial data line

7.1.10

SCLK: serial clock line

7.1.11

D/C: mode select

7.1.12

SCE: chip enable

7.1.13

OSC: oscillator

7.1.14

RES: reset

8

FUNCTIONAL DESCRIPTION

8.1

Oscillator

8.2

Address Counter (AC)

8.3

Display Data RAM (DDRAM)

8.4

Timing generator

8.5

Display address counter

8.6

LCD row and column drivers

9

ADDRESSING

9.1

Data structure

10

INSTRUCTIONS

10.1

Initialization

10.2

Reset function

10.3

Function set

10.3.1

PD

10.3.2

V

10.3.3

H

10.4

Display control

10.4.1

D and E

10.5

Set Y address of RAM

10.6

Set X address of RAM

10.7

Set HV-generator stages

10.8

Bias system

10.9

Temperature control

10.10

Set V

OP

 value

11

LIMITING VALUES

12

HANDLING

13

DC CHARACTERISTICS

14

AC CHARACTERISTICS

15

SERIAL INTERFACE

16

RESET

17

APPLICATION INFORMATION

18

CHIP INFORMATION

19

PAD INFORMATION

20

BONDING PAD LOCATION

21

DEVICE PROTECTION DIAGRAM

22

TRAY INFORMATION

23

DATA SHEET STATUS

24

DEFINITIONS

25

DISCLAIMERS

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2000 Nov 22

3

Philips Semiconductors

Product specification

65

×

 102 pixels matrix LCD driver

PCF8812

1

FEATURES

65 row and 102 column outputs

Display data RAM 65

×

102 bits

On-chip:

– Configurable 5 (4, 3 and 2) voltage multiplier

generating V

LCD

 (external V

LCD

 also possible)

– Generation of intermediate LCD bias voltages

– Oscillator requires no external components

(external clock also possible).

External reset input pin

Serial interface maximum 4.0 Mbit/s

CMOS compatible inputs

Mux rate: 1 : 65

Logic supply voltage range V

DD1

to V

SS

:

– 2.5 to 5.5 V.

High voltage generator supply voltage range

V

DD2

to V

SS

 and V

DD3

to V

SS

– 2.5 to 4.5 V.

Display supply voltage range V

LCD

to V

SS

:

– 4.5 to 9.0 V.

Low power consumption, suitable for battery operated

systems

Temperature compensation of V

LCD

Temperature range: T

amb

=

40 to +85

°

C

Slim chip layout, suited for Chip-On-Glass (COG)

applications.

2

APPLICATIONS

Telecom equipment.

3

GENERAL DESCRIPTION

The PCF8812 is a low power CMOS LCD controller driver,

designed to drive a graphic display of 65 rows and

102 columns. All necessary functions for the display are

provided in a single chip, including on-chip generation of

LCD supply and bias voltages, resulting in a minimum of

external components and low power consumption. The

PCF8812 interfaces to microcontrollers via a serial bus

interface.

4

ORDERING INFORMATION

TYPE NUMBER

PACKAGE

NAME

DESCRIPTION

VERSION

PCF8812U/2

Tray

chip with bumps in tray

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2000 Nov 22

4

Philips Semiconductors

Product specification

65

×

 102 pixels matrix LCD driver

PCF8812

5

BLOCK DIAGRAM

handbook, full pagewidth

MGT636

DISPLAY DATA RAM

(DDRAM)

65 

×

 102 bits

DATA LATCHES

COLUMN DRIVERS

SHIFT REGISTER

RESET

ROW DRIVERS

COL0 to COL101

PCF8812

ROW0 to ROW64

102

T1

T2

T3

T4

T5

TIMING

GENERATOR

ADDRESS COUNTER

DATA

REGISTER

DISPLAY

ADDRESS

COUNTER

OSCILLATOR

OSC

I/O BUFFER

SCE

SDIN

SCLK

VLCDOUT

VLCDSENSE

VLCDIN

VSS2

VSS1

VDD1

VDD2

VDD3

HIGH

VOLTAGE

GENERATOR

4 stages

BIAS

VOLTAGE

GENERATOR

RES

D/C

65

Fig.1  Block diagram.

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Philips Semiconductors

Product specification

65

×

 102 pixels matrix LCD driver

PCF8812

6

PINNING

7

PIN FUNCTIONS

7.1

Pin functions

7.1.1

ROW 0

TO

ROW 64

ROW DRIVER OUTPUTS

These pads output the row signals.

7.1.2

COL 0

TO

COL 101

COLUMN DRIVER OUTPUTS

These pads output the column signals.

7.1.3

V

SS1

AND

V

SS2

:

NEGATIVE POWER SUPPLY RAILS

The 2 supply rails V

SS1

 and V

SS2

 must be connected

together.

7.1.4

V

DD1

TO

V

DD3

:

POSITIVE POWER SUPPLY RAILS

V

DD2

 and V

DD3

 are the supply voltage for the internal

voltage generator. Both have the same voltage and may

be connected together outside of the chip. V

DD1

is used as

supply for the rest of the chip. V

DD1

 can be connected

together with V

DD2

and V

DD3

but in this case care must be

taken to respect the supply voltage range

(see Chapter 13).

If the internal voltage generator is not used then V

DD2

and

V

DD3

 must be connected to V

DD1

 or connected to power.

7.1.5

V

LCDIN

: LCD

POWER SUPPLY

Positive power supply for the liquid crystal display.

An external LCD supply voltage can be supplied using the

V

LCDIN

pad. In this case V

LCDOUT

has to be left open-circuit

and the internal voltage generator has to be programmed

to zero. If the PCF8812 is in Power-down mode, the

external LCD supply voltage has to be switched off.

7.1.6

V

LCDOUT

: LCD

POWER SUPPLY

Positive power supply for the liquid crystal display. If the

internal voltage generator is used, the two supply rails

V

LCDIN

and V

LCDOUT

 must be connected together. If an

external supply is used this pin must be left open-circuit.

7.1.7

V

LCDSENSE

:

VOLTAGE MULTIPLIER REGULATION

INPUT

(V

LCD

)

V

LCDSENSE

 is the input of the internal voltage multiplier

regulation.

If the internal voltage generator is used then V

LCDSENSE

must be connected to V

LCDOUT

. If a external supply voltage

is used then the V

LCDSENSE

 can be let open-circuit or

connected to ground.

SYMBOL

PAD

DESCRIPTION

RES

1

external reset input

(active LOW)

ROW 32 to

ROW 19

2 to 15

LCD row driver outputs

ROW 0 to

ROW 18

18 to 36

LCD row driver outputs

COL 0 to

COL 101

37 to 138

LCD column driver

outputs

ROW 50 to

ROW 33

139 to 156

LCD row driver outputs

ROW 51 to

ROW 64

159 to 172

LCD row driver outputs

V

DD1

174 to 179

supply voltage 1

V

DD3

180

supply voltage 3

V

DD2

181 to 193

supply voltage 2

OSC

194

oscillator input

SDIN

195

serial data input

D/C

196

data/command input

SCE

197

chip enable input

(active LOW)

T2

198

test 2 output

SCLK

199

serial clock input

V

SS2

200 to 213

negative power supply 2

V

SS1

214 to 217

negative power supply 1

T1

218

test 1 input

T5

219

test 5 input

T4

220

test 4 input

V

SS1

221 and 222

negative power supply 1

T3

223

test 3 input/output

V

LCDIN

224 to 229

LCD supply voltage

V

LCDOUT

230 to 236

voltage multiplier output

V

LCDSENSE

237

voltage multiplier

regulation input (V

LCD

)

16, 17, 157,

158 and 173

dummy pads

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Philips Semiconductors

Product specification

65

×

 102 pixels matrix LCD driver

PCF8812

7.1.8

T1

TO

T5:

TEST PADS

T1, T3, T4 and T5 must be connected to V

SS

, T2 must be

left open-circuit. Not accessible to user.

7.1.9

SDIN:

SERIAL DATA LINE

Serial data input line.

7.1.10

SCLK:

SERIAL CLOCK LINE

Input for the clock signal 0 to 4.0 Mbits/s.

7.1.11

D/C:

MODE SELECT

Input to select either command/address or data input.

7.1.12

SCE:

CHIP ENABLE

The enable pin allows data to be clocked in; the signal is

active LOW.

7.1.13

OSC:

OSCILLATOR

When the on-chip oscillator is used this input must be

connected to V

DD

. An external clock signal, if used, is

connected to this input. If the oscillator and external clock

are both inhibited by connecting the OSC pin to V

SS

 the

display is not clocked and may be left in a DC state.

To avoid this the chip should always be put into

Power-down mode before stopping the clock.

7.1.14

RES:

RESET

This signal will reset the device and must be applied to

properly initialize the chip; the signal is active LOW.

8

FUNCTIONAL DESCRIPTION

8.1

Oscillator

The on-chip oscillator provides the clock signal for the

display system. No external components are required and

the OSC input must be connected to V

DD

. An external

clock signal, if used, is connected to this input.

8.2

Address Counter (AC)

The address counter assigns addresses to the display

data RAM for writing. The X address X6 to X0 and the

Y address Y3 to Y0 are set separately. After a write

operation the address counter is automatically

incremented by 1 according to the V flag (see Chapter 9).

8.3

Display Data RAM (DDRAM)

The PCF8812 contains a 65

×

102 bit static RAM which

stores the display data. The RAM is divided into 8 banks of

102 bytes (8

×

8

×

102 bits) and one bank of 102 bits

(1

×

102 bits). During RAM access, data is transferred to

the RAM via the serial interface. There is a direct

correspondence between the X address and the column

output number.

8.4

Timing generator

The timing generator produces the various signals

required to drive the internal circuitry. Internal chip

operation is not affected by operations on the data buses.

8.5

Display address counter

The display is generated by continuously shifting rows of

RAM data to the dot matrix LCD via the column outputs.

The display status (all dots on/off and normal/inverse

video) is set by bits E and D in the command ‘display

control’ (see Table 2).

8.6

LCD row and column drivers

The PCF8812 contains 65 row and 102 column drivers,

which connect the appropriate LCD bias voltages in

sequence to the display in accordance with the data to be

displayed. Figure 2 shows typical waveforms. Unused

outputs should be left unconnected.

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7

Philips Semiconductors

Product specification

65

×

 102 pixels matrix LCD driver

PCF8812

MGT637

ROW 0

R0 (t)

ROW 1

R1 (t)

COL 0

C0 (t)

COL 1

C1 (t)

0 V

0 V

V3 

 VSS

frame n

frame n 

1

0 1 2 3 4 5 6 7 8...

... 64 0 1 2 3 4 5 6 7 8...

... 64

Vstate1(t)

Vstate1(t)

Vstate2(t)

VLCD

V2

V3

V4

V5

VSS

VLCD

V2

V3

V4

V5

VSS

VLCD

V2

V3

V4

V5

VSS

VLCD

V2

V3

V4

V5

VSS

VLCD 

 VSS

VLCD 

 V2

V4 

 V5

VSS 

 V5

V4 

 VLCD

V3 

 V2

VSS 

− 

VLCD

0 V

0 V

V3 

 VSS

Vstate2(t)

VLCD 

 VSS

VLCD 

 V2

V4 

 V5

V4 

 VLCD

V3 

 V2

VSS 

 V5

VSS 

− 

VLCD

Fig.2  Typical LCD driver waveforms.

(1) V

state1

(t) = C1(t)

R0(t).

(2) V

state2

(t) = C1(t)

R1(t).

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Philips Semiconductors

Product specification

65

×

 102 pixels matrix LCD driver

PCF8812

top of LCD

MGS395

DDRAM

bank 0

bank 1

bank 2

bank 3

bank 7

bank 8

LCD

Fig.3  DDRAM to display mapping.

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9

Philips Semiconductors

Product specification

65

×

 102 pixels matrix LCD driver

PCF8812

9

ADDRESSING

Data is downloaded in bytes into the RAM matrix of the PCF8812 as indicated in Figs.3, 4, 5 and 6. The display RAM

has a matrix of 65

×

102 bits. The columns are addressed by the address pointer. The address ranges are: X0 to X101

(1100101) and Y0 to Y8 (1000). Addresses outside of these ranges are not allowed. In vertical addressing mode (V = 1)

the Y address increments after each byte (see Fig.6). After the last Y address (Y = 8) Y wraps around to 0 and X

increments to address the next column. In horizontal addressing mode (V = 0) the X address increments after each byte

(see Fig.5). After the last X address (X = 101) X wraps around to 0 and Y increments to address the next row. After the

very last address (X = 101 and Y = 8) the address pointers wrap around to address (X = 0 and Y = 0).

9.1

Data structure

handbook, full pagewidth

MGT638

0

8

0

101

X address

Y address

MSB

LSB

MSB

LSB

Fig.4  RAM format addressing.

handbook, full pagewidth

MGS397

0

9

1

10

2

3

4

5

6

7

8

0

8

917

0

101

X address

Y address

Fig.5  Sequence of writing data bytes into RAM with vertical addressing (V = 1).

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Product specification

65

×

 102 pixels matrix LCD driver

PCF8812

handbook, full pagewidth

MGS396

0

1

2

102

103

104

204

205

206

306

307

308

408

409

410

510

511

512

612

613

614

714

715

716

816

817

818

0

8

917

0

101

X address

Y address

Fig.6  Sequence of writing data bytes into RAM with horizontal addressing (V = 0).

10 INSTRUCTIONS

The instruction format is divided into two modes: If D/C

(mode select) is set LOW the current byte is interpreted as

command byte (see Table 1). Figure 8 shows an example

of a serial data stream for initializing the chip. If D/C is set

HIGH the following bytes are stored in the display data

RAM. After every data byte the address counter is

incremented automatically. The level of the D/C signal is

read during the last bit of the data byte. Every instruction

can be sent in any order to the PCF8812. The MSB of a

byte is transmitted first. Figure 8 shows one possible

command stream, used to set-up the LCD driver. The

serial interface is initialized when SCE is HIGH. In this

state SCLK clock pulses have no effect and no power is

consumed by the serial interface. A negative edge on SCE

enables the serial interface and indicates the start of a data

transmission.

Figures 9 and 10 show the serial bus protocol:

When SCE is HIGH, SCLK clocks are ignored. During

the HIGH time of SCE the serial interface is initialized

(see Fig.12)

SDIN is sampled at the positive edge of SCLK

D/C indicates whether the byte is a command (D/C = 0)

or RAM data (D/C = 1). It is read with the eighth SCLK

pulse

If SCE stays LOW after the last bit of a command/data

byte, the serial interface expects DB7 of the next byte at

the next positive edge of SCLK (see Fig.12). If SCLK

goes LOW after the last data bit (DB0), either:

– A rising clock edge is required to latch the last data bit

– Or the last bit is latched when SCE goes HIGH.

A reset pulse with RES interrupts the transmission.

No data is written into the RAM. The registers are

cleared. If SCE is LOW after the positive edge of RES,

the serial interface is ready to receive bit 7 of a

command/data byte (see Fig.12).

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Product specification

65

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 102 pixels matrix LCD driver

PCF8812

handbook, halfpage

MGT639

data

data

MSB (DB7)

LSB (DB0)

Fig.7  General format of data stream.

handbook, full pagewidth

MGT640

temperature control

set VOP

bias system

function set (H = 1)

X address

Y address

display control

function set (H = 0)

Fig.8  Example of serial data stream.

handbook, full pagewidth

SCE

D/C

SCLK

SDIN

DB7

DB6

DB5

DB4

DB3

DB2

DB1

DB0

MGT641

Fig.9  Serial bus protocol transmission of one byte.

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Product specification

65

×

 102 pixels matrix LCD driver

PCF8812

handbook, full pagewidth

SCE

D/C

SCLK

SDIN

DB7 DB6 DB5 DB4 DB3 DB2

DB1 DB0

DB7

DB7 DB6 DB5 DB4 DB3 DB2

DB1 DB0

DB6 DB5

MGT642

Fig.10  Serial bus protocol transmission of several bytes.

handbook, full pagewidth

SCE

RES

D/C

SCLK

SDIN

DB7 DB6 DB5 DB4 DB3 DB2

DB1 DB0

DB7

DB7 DB6 DB5 DB4 DB3 DB2

DB1 DB0

DB6 DB5

MGT643

Fig.11  Serial bus reset function (SCE).

handbook, full pagewidth

MGT644

SCE

RES

D/C

SCLK

SDIN

DB7 DB6 DB5 DB4 DB3

DB7

DB7 DB6 DB5 DB4 DB3 DB2

DB1 DB0

DB6 DB5

DB4

Fig.12  Serial bus reset function (RES).

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Philips Semiconductors

Product specification

65

×

 102 pixels matrix LCD driver

PCF8812

Table 1

Instruction set

INSTRUCTION

D/C

COMMAND BYTE

DESCRIPTION

DB7

DB6

DB5

DB4

DB3

DB2

DB1

DB0

(H = 0 or 1)

NOP

0

0

0

0

0

0

0

0

0

no operation

Function set

0

0

0

1

0

0

PD

V

H

power-down control; entry

mode; extended instruction

set control (H)

Write data

1

D

7

D

6

D

5

D

4

D

3

D

2

D

1

D

0

writes data to display RAM

(H = 0)

Reserved

0

0

0

0

0

0

1

X

X

do not use

Display control

0

0

0

0

0

1

D

0

E

sets display configuration

Set higher or lower

programming

range V

op

0

0

0

0

1

0

0

0

PRS V

LCD

 programming range

select

Set Y address of RAM

0

0

1

0

0

Y

3

Y

2

Y

1

Y

0

sets Y address of RAM;

0

Y

8

Set X address of RAM

0

1

X

6

X

5

X

4

X

3

X

2

X

1

X

0

sets X address part of RAM;

0

X

101

(H = 1)

Reserved

0

0

0

0

0

0

0

0

1

do not use

Reserved

0

0

0

0

0

0

0

1

X

do not use

Temperature control

0

0

0

0

0

0

1

TC

1

TC

0

set temperature coefficient

(TCx)

HV-gen stages

0

0

0

0

0

1

0

S

1

S

0

# of HV-gen voltage

multiplication

Bias system

0

0

0

0

1

0

BS

2

BS

1

BS

0

set bias system (BSx)

Reserved

0

0

1

X

X

X

X

X

X

do not use (reserved for test)

Set V

op

0

1

V

OP6

V

OP5

V

OP4

V

OP3

V

OP2

V

OP1

V

OP0

write V

OP

 to register

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Product specification

65

×

 102 pixels matrix LCD driver

PCF8812

Table 2

Explanations for symbols in Table 1

BIT

0

 1

RESET STATE

PD

chip is active

chip is in Power-down mode

1

V

horizontal addressing

vertical addressing

0

H

use basic instruction set

use extended instruction set

0

PRS

V

LCD

 programming range;

LOW

V

LCD

 programming range;

HIGH

0

D, E

00

display blank

D = 0

10

normal mode

01

all display segments on

E = 0

11

inverse video mode

TC1 to

TC0

00

V

LCD

 temperature

coefficient 0

TC1 to TC0 = 00

01

V

LCD

 temperature

coefficient 1

10

V

LCD

 temperature

coefficient 2

11

V

LCD

 temperature

coefficient 3

S1 to S0

00

2

×

voltage multiplier

S1 to S0 = 00

01

3

×

voltage multiplier

10

4

×

voltage multiplier

11

5

×

voltage multiplier

V

OP

6 to

V

OP

0

V

LCD

 programming

V

OP

6 to V

OP

0 = 0000000

BS2 to

BS0

bias system

BS2 to BS0 = 000

10.1

Initialization

Immediately following power-on, all internal registers as

well as the RAM content are undefined; a reset pulse must

be applied.

Reset is accomplished by applying an external reset pulse

(active LOW) at the pad RES. When reset occurs within

the specified time, all internal registers are reset, however

the RAM is still undefined. The state after reset is

described in Section 10.2.

The RES input must be

0.3V

DD

 when V

DD

 reaches

V

DD(min)

 (or higher) within a maximal time t

VHRL

 after V

DD

going HIGH (see Fig.16).

10.2

Reset function

After reset the LCD driver has the following state:

Power-down mode (PD = 1)

Horizontal addressing (V = 0)

Normal instruction set (H = 0)

Display blank (E = D = 0)

Address counter X6 to X0 = 0; Y3 to Y0 = 0

Temperature control mode (TC1 to TC0 = 0)

Bias system (BS2 to BS0 = 0)

V

LCD

 is equal to 0; the HV-generator is switched off

(V

OP

6 to V

OP

0 = 0 and PRS = 0)

After power-on; RAM data is undefined; the reset signal

doesn’t change the content of the RAM

All LCD outputs at V

SS

 (display off).

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PCF8812

10.3

Function set

10.3.1

PD

All LCD outputs at V

SS

 (display off)

Bias generator and V

LCD

 generator off; V

LCD

 can be

disconnected

Oscillator off (external clock possible)

Serial bus; command; etc. function

RAM contents not cleared; RAM data can be written

V

LCD

 discharged to V

SS

 in Power-down mode.

10.3.2

V

When V = 0, the horizontal addressing is selected. The

data is written into the DDRAM as shown in Fig.5. When

V = 1, the vertical addressing is selected. The data is

written into the DDRAM as shown in Fig.6.

10.3.3

H

When H = 0 the commands ‘display control’, ‘set

Y address’, ‘set X address’ and set the PRS bit (low or high

range of the high voltage generator) can be performed,

when H = 1 the others can be executed. The commands

‘write data’ and ‘function set’ can be executed in both

cases.

10.4

Display control

10.4.1

D

AND

E

The bits D and E select the display mode (see Table 2).

10.5

Set Y address of RAM

Y3 to Y0 defines the Y address vector address of the

display RAM (see Table 3).

Table 3

X/Y address range: note 1

Note

1. In bank 8 only the LSB is accessed.

10.6

Set X address of RAM

The X address points to the columns. The range of X is 0 to 101 (65H).

10.7

Set HV-generator stages

The PCF8812 incorporates a software configurable voltage multiplier. After reset (RES) the voltage multiplier is set to

2

×

V

DD2

. Other voltage multiplier factors are set via the command ‘Set HV-gen stages’ (see Tables 1 and 2).

Y

3

Y

2

Y

1

Y

0

CONTENT

ALLOWED X RANGE

0

0

0

0

bank 0 (display RAM)

0 to 101

0

0

0

1

bank 1 (display RAM)

0 to 101

0

0

1

0

bank 2 (display RAM)

0 to 101

0

0

1

1

bank 3 (display RAM)

0 to 101

0

1

0

0

bank 4 (display RAM)

0 to 101

0

1

0

1

bank 5 (display RAM)

0 to 101

0

1

1

0

bank 6 (display RAM)

0 to 101

0

1

1

1

bank 7 (display RAM)

0 to 101

1

0

0

0

bank 8 (display RAM)

0 to 101

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Philips Semiconductors

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 102 pixels matrix LCD driver

PCF8812

10.8

Bias system

The bias voltage levels are set in the ratio of R - R - nR - R - R giving a

 bias system. Different multiplex rates

require different factors ‘n’ (see Table 4). This is programmed by BS2 to BS0. For MUX1 to MUX65 the optimum bias

value ‘n’ is given by:

 resulting in

1

/

9

bias.

Table 4

Programming the required bias system

Table 5

LCD bias voltage

BS2

BS1

BS0

n

RECOMMEND MUX

RATE

0

0

0

7

1 to 100

0

0

1

6

1 to 80

0

1

0

5

1 to 65  or  1 to 65

0

1

1

4

1 to 48

1

0

0

3

1 to 40  or  1 to 34

1

0

1

2

1 to 24

1

1

0

1

1 to 18  or  1 to 16

1

1

1

0

1 to 10 or  1 to 9

or 1 to 8

SYMBOL

BIAS VOLTAGES

BIAS VOLTAGES FOR n = 5 (

1

/

9

BIAS)

V1

V

LCD

V

LCD

V2

8

/

9

×

V

LCD

V3

7

/

9

×

V

LCD

V4

2

/

9

×

V

LCD

V5

1

/

9

×

V

LCD

V6

V

SS

V

SS

1

n

4

+

(

)

-----------------

n

65

3

5.062

5

=

=

=

n

3

+

(

)

n

4

+

(

)

-----------------

n

2

+

(

)

n

4

+

(

)

-----------------

2

n

4

+

(

)

-----------------

1

n

4

+

(

)

-----------------

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Philips Semiconductors

Product specification

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 102 pixels matrix LCD driver

PCF8812

10.9

Temperature control

Due to the temperature dependency of the liquid crystals

viscosity the LCD controlling voltage V

LCD

 must be

increased with lower temperature to maintain optimum

contrast. There are 4 different temperature coefficients

available in the PCF8812 (see Fig.13). The coefficients

are selected by bits TC1 to TC0. Table 6 shows the typical

values of the different temperature coefficients. The

coefficients are proportional to the programmed V

LCD

.

10.10 Set V

OP

 value

The operating voltage V

LCD

 can be set by software. The

generated voltage is dependent on temperature,

programmed Temperature Coefficient (TC) and the

programmed voltage at reference temperature (T

cut

).

(1)

The voltage at reference temperature [V

LCD

(T = T

cut

)] can

be calculated as follows:

(2)

The parameters are explained in Table 6. The maximum

voltage that can be generated is dependent on the V

DD2

voltage and the display load current. Two overlapping

V

LCD

 ranges are selectable via the command ‘HV-gen

control’. For the LOW (PRS = 0) range a = a

1

 and for the

HIGH (PRS = 1) range a = a

2

with steps equal to ‘b’ in both

ranges. It should be noted that the charge pump is turned

off if V

OP

6 to 0 and the bit PRS are all set to zero

(see Fig.14).

For MUX 1 to 65 the optimum operating voltage of the

liquid can be calculated as follows;

(3)

where V

th

 is the threshold voltage of the liquid crystal

material used.

Table 6

Typical values for parameters for the

HV-generator programming

As the programming range for the internally generated

V

LCD

 allows values above the maximum allowed V

LCD

(9 V) the user has to ensure, while setting the V

OP

register

and selecting the Temperature Compensation (TC), that

under all conditions and including all tolerances that V

LCD

remains below 9 V.

handbook, halfpage

MGS402

T

VLCD

Tcut

Fig.13  Temperature coefficients.

V

LCD T

( )

a

V

OP

b

×

+

(

)

1

T

T

cut

(

)

TC

×

+

(

)

=

V

LCD T = T

cut

(

)

a

V

OP

b

×

+

(

)

=

SYMBOL

VALUE

UNIT

a1

2.94 (PRS = 0)

V

a2

6.75 (PRS = 1)

V

b

0.03

V

T

cut

27

°

C

V

LCD

1

65

+

2

1

1

65

----------

×

---------------------------------------

V

th

×

6.85

V

th

×

=

=

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Philips Semiconductors

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 102 pixels matrix LCD driver

PCF8812

handbook, full pagewidth

MGS658

0H 01H 02H

a1

+

b

a2

a1

VLCD

b

03H 04H 05H 06H

. . .

5FH 6FH 7FH 00H 01H 02H 03H 04H 05H 06H

. . .

5FH 6FH 7FH

LOW (PRS = 0)

HIGH (PRS = 1)

charge pump off

Fig.14  V

OP

 programming of PCF8812 (at T = T

cut

).

V

OP

6 to 0 (programmed) [00H to 7FH; programming range LOW and HIGH].

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Product specification

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PCF8812

11 LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 60134); see notes 1 and 2

Notes

1. Stresses above those listed under limiting values may cause permanent damage to the device.

2. Parameters are valid over operating temperature range unless otherwise specified. All voltages are referenced to

V

SS

 unless otherwise specified.

3. Human body model: equivalent to discharging a 100 pF capacitor through a 1.5 k

 resistor.

4. Machine model: equivalent to discharging a 200 pF capacitor through a 0.75

µ

H series inductor.

12 HANDLING

Inputs and outputs are protected against electrostatic discharge in normal handling. However, to be totally safe, it is

desirable to take normal precautions appropriate to handling MOS devices (see

“Handling MOS devices”).

SYMBOL

PARAMETER

CONDITIONS

MIN.

MAX.

UNIT

V

DD1

supply voltage

0.5

+6.5

V

V

DD2,

V

DD3

supply voltage for internal voltage

generator

0.5

+4.5

V

V

LCD

supply voltage range LCD

0.5

+9.0

V

V

i

all input voltages

0.5

V

DD

+ 0.5

V

I

SS

ground supply current

50

+50

mA

I

i

,I

o

DC input or output current

10

+10

mA

P

tot

total power dissipation

300

mW

P

O

power dissipation per output

30

mW

T

stg

storage temperature

65

+150

°

C

V

es

electrostatic handling voltage

note 3

±

1900

V

note 4

±

200

V

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Product specification

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 102 pixels matrix LCD driver

PCF8812

13 DC CHARACTERISTICS

V

DD

= 2.5 to 5.5 V; V

SS

= 0 V;  V

LCD

= 4.5 to 9.0 V; T

amb

=

40 to +85

°

C; unless otherwise specified.

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

V

DD1

supply voltage

+2.5

+5.5

V

V

DD2,

V

DD3

supply voltage for internal

voltage generator

LCD voltage internally

generated (voltage

generator enabled)

+2.5

+4.5

V

V

LCDIN

LCD input supply voltage

LCD voltage externally

supplied (voltage generator

disabled)

+4.5

+9.0

V

V

LCDOUT

LCD output supply voltage

LCD voltage internally

generated (voltage

generator enabled); note 1

+4.5

+9.0

V

I

DD(tot)

total supply current

normal mode; V

DD1

= 2.8 V;

V

LCD

= 7.6 V; f

SCLK

= 0;

T

amb

= 25

°

C; no display

load; 4

×

charge pump;

notes 2 and 3

220

350

µ

A

Power-down mode; with

internal or external V

LCD

supply voltage; note 4

1.5

µ

A

I

LCDIN

supply current from external

V

LCD

V

DD1

= 2.8 V; V

LCD

= 7.6 V;

f

SCLK

= 0; T = 25

°

C;

no display load;

notes 2, 3 and 5

30

µ

A

Logic

V

IL

LOW-level input voltage

V

SS

0.3V

DD

V

V

IH

HIGH-level input voltage

0.7V

DD

V

DD

V

I

IL

input leakage current

V

I

= V

DD1

 or V

SS1

1

+1

µ

A

Column and row outputs

R

col

column output resistance

COL 0 to COL 101

I

L

= 10

µ

A outputs tested

one at a time

12

20

k

R

row

row output resistance

ROW 0 to ROW 64

I

L

= 10

µ

A outputs tested

one at a time

12

20

k

V

bias(col)

column bias tolerance

COL 0 to COL 101

100

0

+100

mV

V

bias(row)

row bias tolerance

ROW 0 to ROW 64

100

0

+100

mV

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Philips Semiconductors

Product specification

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×

 102 pixels matrix LCD driver

PCF8812

Notes

1. The maximum possible V

LCD

voltage that may be generated is dependent on voltage, temperature and (display) load.

2. Internal clock.

3. f

SCLK

= 0 means no serial clock.

4. During power-down all static currents are switched off.

5. If external V

LCD

; the display load current is not transmitted to I

DD

.

6. Tolerance depend on the temperature; (typical null at T

amb

= 27

°

C, maximum tolerance values are measured at the

temperate range limit, maximum tolerance is proportional to V

LCD

).

7. For TC1 to TC3.

14 AC CHARACTERISTICS

V

DD

= 2.5 to 5.5 V; V

SS

= 0 V;  V

LCD

= 4.5 to 9.0 V; T

amb

=

40 to +85

°

C; unless otherwise specified.

LCD supply voltage generator

V

LCD

V

LCD

 tolerance internally

generated

V

DD1

= 2.8 V; V

LCD

= 7.6 V;

f

SCLK

= 0; T

amb

= 25

°

C;

display-load = 10

µ

A;

notes 3, 6 and 7

300

0

+300

mV

TC

V

LCD

 temperature coefficient V

DD1

= 2.8 V; f

SCLK

= 0;

T

amb

=

20 to +70

°

C;

display load = 10

µ

A; note 3

coefficient 0

0

×

10

3

1/

°

C

coefficient 1

0.76

×

10

3

1/

°

C

coefficient 2

1.05

×

10

3

1/

°

C

coefficient 3

2.10

×

10

3

1/

°

C

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

f

OSC

oscillator frequency

V

DD1

= 2.8 V;

T

amb

=

20 to +70

°

C

22

38

67

kHz

f

clk(ext)

external clock frequency

20

38

67

kHz

f

frame

frame frequency

f

OSC

 or f

clk(ext)

= 38 kHz;

note 1

73

Hz

t

VHRL

V

DD

 to RES LOW

see Fig.16

0

1

µ

s

t

RW

RES LOW pulse width

see Fig.16

500

ns

Serial bus timing characteristics

f

SCLK

clock frequency

V

DD1

= 3.0 V

±

10%; all

signal timing is based on

20% to 80% of V

DD

 and a

maximum rise and fall time

of 10 ns

0

4.00

MHz

t

cyc

clock cycle time

250

ns

t

PWH1

SCLK pulse width HIGH

100

ns

t

PWL1

SCLK pulse width LOW

100

ns

t

S2

SCE set-up time

60

ns

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

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Philips Semiconductors

Product specification

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×

 102 pixels matrix LCD driver

PCF8812

Notes

1.

2. t

H5

is the time from the previous SCLK positive edge (irrespective of the state of SCE) to the negative edge of SCE

(see Fig.15).

15 SERIAL INTERFACE

t

H2

SCE hold time

100

ns

t

PWH2

SCE minimum HIGH time

100

ns

t

H5

SCE start hold time

note 2

100

ns

t

S3

D/C set-up time

100

ns

t

H3

D/C hold time

100

ns

t

S4

SDIN set-up time

100

ns

t

H4

SDIN hold time

100

ns

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

f

frame

f

clk(ext)

520

----------------

=

handbook, full pagewidth

MGT645

tH4

tPWH1

tPWL1

tH3

tS4

tS2

tS3

tS2

tH2

tH5

tCYC

(tH5)

tPWH2

SCE

D/C

SCLK

SDIN

Fig.15  Serial interface timing.

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Philips Semiconductors

Product specification

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 102 pixels matrix LCD driver

PCF8812

16 RESET

17 APPLICATION INFORMATION

Table 7

Programming example for PCF8812

STEP

SERIAL BUS BYTE

DISPLAY

OPERATION

D/C

DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0

1

start

SCE is going low

2

0

0

0

1

0

0

0

0

1

function set; PD = 0, V = 0;

select extended instruction

set (H = 1 mode)

3

0

0

0

0

1

0

0

0

1

set charge pump range

HIGH PRS = 1

4

0

1

0

0

1

1

1

0

0

set V

OP

; V

OP

is set to 7.6 V

5

0

0

0

1

0

0

0

0

0

function set; PD = 0; V = 0;

select normal instruction

set (H = 0 mode)

6

0

0

0

0

0

1

1

0

0

display control; set normal

mode (D = 1; E = 0).

7

1

1

1

1

1

1

0

0

0

data write; Y and X are

initialized to 0 by default,

so they aren’t set here

handbook, full pagewidth

MGT646

tVHRL

tRW

tRW

tRW

tRW

RES

VDD

RES

VDD

Fig.16  Reset timing.

MGS405

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Philips Semiconductors

Product specification

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×

 102 pixels matrix LCD driver

PCF8812

8

1

1

0

1

0

0

0

0

0

data write

9

1

1

1

1

0

0

0

0

0

data write

10

1

0

0

0

0

0

0

0

0

data write

11

1

1

1

1

1

1

0

0

0

data write

12

1

0

0

1

0

0

0

0

0

data write

13

1

1

1

1

1

1

0

0

0

data write

STEP

SERIAL BUS BYTE

DISPLAY

OPERATION

D/C

DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0

MGS406

MGS407

MGS407

MGS409

MGS410

MGS411

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2000 Nov 22

25

Philips Semiconductors

Product specification

65

×

 102 pixels matrix LCD driver

PCF8812

The pinning of the PCF8812 is optimized for single plane wiring e.g. for chip-on-glass display modules. Display size:

65

×

102 pixels.

14

0

0

0

0

0

1

1

0

1

display control; set inverse

video mode (D = 1; E = 1)

15

0

1

0

0

0

0

0

0

0

set X-address of RAM; set

address to 0000000

16

1

0

0

0

0

0

0

0

0

data write

STEP

SERIAL BUS BYTE

DISPLAY

OPERATION

D/C

DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0

MGS412

MGS412

MGS414

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Philips Semiconductors

Product specification

65

×

 102 pixels matrix LCD driver

PCF8812

handbook, full pagewidth

MGT647

4

(1)

DISPLAY 102 

×

 65 

V

DD1

V

DD2

V

DD3

I/O

CVLCD

V

SS2

V

SS1

V

LCDSENSE

V

LCDOUT

V

LCDIN

reset

RES

PCF8812

102

32

33

VDD

VSS

CVDD

Fig.17  Application diagram; internal charge pump is used and a single V

DD

.

handbook, full pagewidth

MGT648

4

(1)

DISPLAY 102 

×

 65 

V

DD1

V

DD2

V

DD3

VDD1

VDD2

I/O

VSS

CVLCD

CVDD1

V

SS2

V

SS1

V

LCDSENSE

V

LCDOUT

V

LCDIN

CVDD2

reset

RES

PCF8812

102

32

33

Fig.18  Application diagram; internal charge pump is used and two separate V

DD

 (V

DD1

 and V

DD2

).

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2000 Nov 22

27

Philips Semiconductors

Product specification

65

×

 102 pixels matrix LCD driver

PCF8812

The required minimum value for the external capacitors in an application with the PCF8812 are as follows:

C

VLCD

= 100 nF (minimum)

C

VDD

; C

VDD1

; C

VDD2

= 1

µ

F (minimum).

Higher capacitor values are recommended for ripple reduction.

18 CHIP INFORMATION

The PCF8812 is manufactured in n-well CMOS technology. The substrate is at V

SS

 potential.

19 PAD INFORMATION

Table 8

Bonding pad dimensions

NAME

DIMENSION

Pad pitch

70

µ

m

Pad size; aluminium

62

×

100

µ

m

Bump dimensions

50

×

90

×

17.5

µ

m (

±

5)

Wafer thickness; including bumps

maximum 430

µ

m

Wafer thickness; without bumps

381

µ

m typ.

handbook, full pagewidth

MGT649

4

(1)

DISPLAY 102 

×

 65 

V

DD1

V

DD2

V

DD3

VDD

I/O

VSS VLCDIN

CVDD

V

SS2

V

SS1

V

LCDSENSE

V

LCDOUT

V

LCDIN

reset

RES

PCF8812

102

32

33

Fig.19  Application diagram; external high voltage generation is used.

background image

2000 Nov 22

28

Philips Semiconductors

Product specification

65

×

 102 pixels matrix LCD driver

PCF8812

20 BONDING PAD LOCATION

Table 9

Bonding pad location

All x and y coordinates are referenced to the centre of the

chip (dimensions in

µ

m; see Fig.20).

SYMBOL

PAD

COORDINATES

x

y

RES

1

+3870

+934.6

ROW 32

2

+4270

+934.6

ROW 31

3

+4340

+934.6

ROW 30

4

+4410

+934.6

ROW 29

5

+4480

+934.6

ROW 28

6

+4550

+934.6

ROW 27

7

+4620

+934.6

ROW 26

8

+4690

+934.6

ROW 25

9

+4760

+934.6

ROW 24

10

+4830

+934.6

ROW 23

11

+4900

+934.6

ROW 22

12

+4970

+934.6

ROW 21

13

+5040

+934.6

ROW 20

14

+5110

+934.6

ROW 19

15

+5180

+934.6

dummy pad

16

+5320

+934.6

dummy pad

17

+5355

934.6

ROW 0

18

+5005

934.6

ROW 1

19

+4935

934.6

ROW 2

20

+4865

934.6

ROW 3

21

+4795

934.6

ROW 4

22

+4725

934.6

ROW 5

23

+4655

934.6

ROW 6

24

+4585

934.6

ROW 7

25

+4515

934.6

ROW 8

26

+4445

934.6

ROW 9

27

+4375

934.6

ROW 10

28

+4305

934.6

ROW 11

29

+4235

934.6

ROW 12

30

+4165

934.6

ROW 13

31

+4095

934.6

ROW 14

32

+4025

934.6

ROW 15

33

+3955

934.6

ROW 16

34

+3885

934.6

ROW 17

35

+3815

934.6

ROW 18

36

+3745

934.6

COL 0

37

+3605

934.6

COL 1

38

+3535

934.6

COL 2

39

+3465

934.6

COL 3

40

+3395

934.6

COL 4

41

+3325

934.6

COL 5

42

+3255

934.6

COL 6

43

+3185

934.6

COL 7

44

+3115

934.6

COL 8

45

+3045

934.6

COL 9

46

+2975

934.6

COL 10

47

+2905

934.6

COL 11

48

+2835

934.6

COL 12

49

+2765

934.6

COL 13

50

+2695

934.6

COL 14

51

+2625

934.6

COL 15

52

+2555

934.6

COL 16

53

+2485

934.6

COL 17

54

+2415

934.6

COL 18

55

+2345

934.6

COL 19

56

+2275

934.6

COL 20

57

+2205

934.6

COL 21

58

+2135

934.6

COL 22

59

+2065

934.6

COL 23

60

+1995

934.6

COL 24

61

+1925

934.6

COL 25

62

+1785

934.6

COL 26

63

+1715

934.6

COL 27

64

+1645

934.6

COL 28

65

+1575

934.6

COL 29

66

+1505

934.6

COL 30

67

+1435

934.6

COL 31

68

+1365

934.6

COL 32

69

+1295

934.6

COL 33

70

+1225

934.6

COL 34

71

+1155

934.6

COL 35

72

+1085

934.6

COL 36

73

+1015

934.6

COL 37

74

+945

934.6

COL 38

75

+875

934.6

SYMBOL

PAD

COORDINATES

x

y

background image

2000 Nov 22

29

Philips Semiconductors

Product specification

65

×

 102 pixels matrix LCD driver

PCF8812

COL 39

76

+805

934.6

COL 40

77

+735

934.6

COL 41

78

+665

934.6

COL 42

79

+595

934.6

COL 43

80

+525

934.6

COL 44

81

+455

934.6

COL 45

82

+385

934.6

COL 46

83

+315

934.6

COL 47

84

+245

934.6

COL 48

85

+175

934.6

COL 49

86

+105

934.6

COL 50

87

35

934.6

COL 51

88

105

934.6

COL 52

89

175

934.6

COL 53

90

245

934.6

COL 54

91

315

934.6

COL 55

92

385

934.6

COL 56

93

455

934.6

COL 57

94

525

934.6

COL 58

95

595

934.6

COL 59

96

665

934.6

COL 60

97

735

934.6

COL 61

98

805

934.6

COL 62

99

875

934.6

COL 63

100

945

934.6

COL 64

101

1015

934.6

COL 65

102

1085

934.6

COL 66

103

1155

934.6

COL 67

104

1225

934.6

COL 68

105

1295

934.6

COL 69

106

1365

934.6

COL 70

107

1435

934.6

COL 71

108

1505

934.6

COL 72

109

1575

934.6

COL 73

110

1645

934.6

COL 74

111

1715

934.6

COL 75

112

1785

934.6

COL 76

113

1925

934.6

COL 77

114

1995

934.6

SYMBOL

PAD

COORDINATES

x

y

COL 78

115

2065

934.6

COL 79

116

2135

934.6

COL 80

117

2205

934.6

COL 81

118

2275

934.6

COL 82

119

2345

934.6

COL 83

120

2415

934.6

COL 84

121

2485

934.6

COL 85

122

2555

934.6

COL 86

123

2625

934.6

COL 87

124

2695

934.6

COL 88

125

2765

934.6

COL 89

126

2835

934.6

COL 90

127

2905

934.6

COL 91

128

2975

934.6

COL 92

129

3045

934.6

COL 93

130

3115

934.6

COL 94

131

3185

934.6

COL 95

132

3255

934.6

COL 96

133

3325

934.6

COL 97

134

3395

934.6

COL 98

135

3465

934.6

COL 99

136

3535

934.6

COL 100

137

3605

934.6

COL 101

138

3675

934.6

ROW 50

139

3815

934.6

ROW 49

140

3885

934.6

ROW 48

141

3955

934.6

ROW 47

142

4025

934.6

ROW 46

143

4095

934.6

ROW 45

144

4165

934.6

ROW 44

145

4235

934.6

ROW 43

146

4305

934.6

ROW 42

147

4375

934.6

ROW 41

148

4445

934.6

ROW 40

149

4515

934.6

ROW 39

150

4585

934.6

ROW 38

151

4655

934.6

ROW 37

152

4725

934.6

ROW 36

153

4795

934.6

SYMBOL

PAD

COORDINATES

x

y

background image

2000 Nov 22

30

Philips Semiconductors

Product specification

65

×

 102 pixels matrix LCD driver

PCF8812

ROW 35

154

4865

934.6

ROW 34

155

4935

934.6

ROW 33

156

5005

934.6

dummy pad

157

5355

934.6

dummy pad

158

5320

+934.6

ROW 51

159

5180

+934.6

ROW 52

160

5110

+934.6

ROW 53

161

5040

+934.6

ROW 54

162

4970

+934.6

ROW 55

163

4900

+934.6

ROW 56

164

4830

+934.6

ROW 57

165

4760

+934.6

ROW 58

166

4690

+934.6

ROW 59

167

4620

+934.6

ROW 60

168

4550

+934.6

ROW 61

169

4480

+934.6

ROW 62

170

4410

+934.6

ROW 63

171

4340

+934.6

ROW 64

172

4270

+934.6

dummy pad

173

4050

+934.6

V

DD1

174

3890

+934.6

V

DD1

175

3810

+934.6

V

DD1

176

3730

+934.6

V

DD1

177

3650

+934.6

V

DD1

178

3570

+934.6

V

DD1

179

3490

+934.6

V

DD3

180

3250

+934.6

V

DD2

181

3090

+934.6

V

DD2

182

3010

+934.6

V

DD2

183

2930

+934.6

V

DD2

184

2850

+934.6

V

DD2

185

2770

+934.6

V

DD2

186

2690

+934.6

V

DD2

187

2610

+934.6

V

DD2

188

2530

+934.6

V

DD2

189

2450

+934.6

V

DD2

190

2370

+934.6

V

DD2

191

2290

+934.6

V

DD2

192

2210

+934.6

SYMBOL

PAD

COORDINATES

x

y

V

DD2

193

2130

+934.6

OSC

194

1890

+934.6

SDIN

195

1650

+934.6

D/C

196

1410

+934.6

SCE

197

1170

+934.6

T2

198

930

+934.6

SCLK

199

690

+934.6

V

SS2

200

530

+934.6

V

SS2

201

450

+934.6

V

SS2

202

370

+934.6

V

SS2

203

290

+934.6

V

SS2

204

210

+934.6

V

SS2

205

130

+934.6

V

SS2

206

50

+934.6

V

SS2

207

+30

+934.6

V

SS2

208

+110

+934.6

V

SS2

209

+190

+934.6

V

SS2

210

+270

+934.6

V

SS2

211

+350

+934.6

V

SS2

212

+430

+934.6

V

SS2

213

+510

+934.6

V

SS1

214

+670

+934.6

V

SS1

215

+750

+934.6

V

SS1

216

+830

+934.6

V

SS1

217

+910

+934.6

T1

218

+1150

+934.6

T5

219

+1630

+934.6

T4

220

+2030

+934.6

V

SS1

221

+2110

+934.6

V

SS1

222

+2190

+934.6

T3

223

+2270

+934.6

V

LCDIN

224

+2510

+934.6

V

LCDIN

225

+2590

+934.6

V

LCDIN

226

+2670

+934.6

V

LCDIN

227

+2750

+934.6

V

LCDIN

228

+2830

+934.6

V

LCDIN

229

+2910

+934.6

V

LCDOUT

230

+3070

+934.6

V

LCDOUT

231

+3150

+934.6

SYMBOL

PAD

COORDINATES

x

y

background image

2000 Nov 22

31

Philips Semiconductors

Product specification

65

×

 102 pixels matrix LCD driver

PCF8812

V

LCDOUT

232

+3230

+934.6

V

LCDOUT

233

+3310

+934.6

V

LCDOUT

234

+3390

+934.6

V

LCDOUT

235

+3470

+934.6

V

LCDOUT

236

+3550

+934.6

V

LCDSENSE

237

+3630

+934.6

Alignment marks

Circle 1

+5185

910.8

Circle 2

5185

910.8

Circle 3

4160

+909.7

Circle 4

+4160

+909.7

SYMBOL

PAD

COORDINATES

x

y

background image

2000

Nov

22

32

Philips Semiconductors

Product specification

65

×

 102 pix

els matr

ix LCD dr

iv

er

PCF8812

This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in

_

white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in

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MGT653

a

ndbook, full pagewidth

dumm

y pad

dumm

y pad

dumm

y pad

dumm

y pad

dumm

y pad

alignment mar

k

alignment mar

k

alignment mar

k

alignment mar

k

pad No

.1

T3

T4

T5

T1

T2

SCLK

RES

SCE

D/

C

SDIN

OSC

V

DD3

V

SS1

V

SS1

V

SS2

V

DD2

V

DD1

V

LCDIN

V

LCDOUT

V

LCDSENSE

PC8812-1

x

y

0, 0

R

O

W 33

R

O

W 50

COL 101

COL 76

COL 50

COL 25

COL 0

..

.

..

.

..

.

..

.

R

O

W 51

R

O

W 64

..

.

..

.

R

O

W 32

R

O

W 19

..

.

..

.

R

O

W 18

R

O

W 0

..

.

..

.

Fig.20  Bonding pad locations.

(1) The alignment marks are circular with a diameter of 100

µ

m.

(2) Maximum chip size: 2.1

×

10.9 mm.

background image

2000 Nov 22

33

Philips Semiconductors

Product specification

65

×

 102 pixels matrix LCD driver

PCF8812

21 DEVICE PROTECTION DIAGRAM

handbook, full pagewidth

VSS2

VSS1

VDD1

VDD3

VLCDIN

VLCDOUT

VLCDSENSE

VSS1

VDD1

T3, T2

VSS1

VSS1

VSS2

VDD2

VSS1

VSS2

MGT650

VLCDIN

COL 0-101/ ROW 0-64

1 per block

VSS1

VSS1

VDD1

VSS1

SDIN

SCLK

SCE

D/C

OSC

RES

T1, T4, T5

Fig.21  Device protection diagram.

background image

2000 Nov 22

34

Philips Semiconductors

Product specification

65

×

 102 pixels matrix LCD driver

PCF8812

22 TRAY INFORMATION

handbook, full pagewidth

,,,,,,,

,,,,,,,

MGT651

D

F

E

x

y

A

G

H

1,1

x,1

2,1

1,2

1,3

1,y

x,y

2,2

3,1

C

B

K

L

M

J

A

A

SECTION A-A

Fig.22  Tray details.

Table 10 Tray dimensions

handbook, halfpage

MGT652

PC8812

Fig.23  Tray alignment.

The orientation of the IC in a pocket is indicated by the position of

the IC type name on the die surface with respect to the chamfer on

the upper left corner of the tray. Refer to the bonding pad location

diagram for the orientating and position of the type name on the die

surface.

DIMENSION

DESCRIPTION

VALUE

A

pocket pitch; x direction

13.77 mm

B

pocket pitch; y direction

4.37 mm

C

pocket width; x direction

11.04 mm

D

pocket width; y direction

2.24 mm

E

tray width; x direction

50.8 mm

F

tray width; y direction

50.8 mm

G

distance from cut corner

to pocket (1 and 1) centre

11.68 mm

H

distance from cut corner

to pocket (1 and 1) centre

5.74 mm

J

tray thickness

3.96 mm

K

tray cross section

1.78 mm

L

tray cross section

2.49 mm

M

pocket depth

0.89 mm

x

no. pockets in x direction

3

y

no. pockets in y direction

10

background image

2000 Nov 22

35

Philips Semiconductors

Product specification

65

×

 102 pixels matrix LCD driver

PCF8812

23 DATA SHEET STATUS

Note

1. Please consult the most recently issued data sheet before initiating or completing a design.

DATA SHEET STATUS

PRODUCT

STATUS

DEFINITIONS

(1)

Objective specification

Development

This data sheet contains the design target or goal specifications for

product development. Specification may change in any manner without

notice.

Preliminary specification

Qualification

This data sheet contains preliminary data, and supplementary data will be

published at a later date. Philips Semiconductors reserves the right to

make changes at any time without notice in order to improve design and

supply the best possible product.

Product specification

Production

This data sheet contains final specifications. Philips Semiconductors

reserves the right to make changes at any time without notice in order to

improve design and supply the best possible product.

24 DEFINITIONS

Short-form specification

 The data in a short-form

specification is extracted from a full data sheet with the

same type number and title. For detailed information see

the relevant data sheet or data handbook.

Limiting values definition

Limiting values given are in

accordance with the Absolute Maximum Rating System

(IEC 60134). Stress above one or more of the limiting

values may cause permanent damage to the device.

These are stress ratings only and operation of the device

at these or at any other conditions above those given in the

Characteristics sections of the specification is not implied.

Exposure to limiting values for extended periods may

affect device reliability.

Application information

 Applications that are

described herein for any of these products are for

illustrative purposes only. Philips Semiconductors make

no representation or warranty that such applications will be

suitable for the specified use without further testing or

modification.

25 DISCLAIMERS

Life support applications

 These products are not

designed for use in life support appliances, devices, or

systems where malfunction of these products can

reasonably be expected to result in personal injury. Philips

Semiconductors customers using or selling these products

for use in such applications do so at their own risk and

agree to fully indemnify Philips Semiconductors for any

damages resulting from such application.

Right to make changes

 Philips Semiconductors

reserves the right to make changes, without notice, in the

products, including circuits, standard cells, and/or

software, described or contained herein in order to

improve design and/or performance. Philips

Semiconductors assumes no responsibility or liability for

the use of any of these products, conveys no licence or title

under any patent, copyright, or mask work right to these

products, and makes no representations or warranties that

these products are free from patent, copyright, or mask

work right infringement, unless otherwise specified.

Bare die

 All die are tested and are guaranteed to

comply with all data sheet limits up to the point of wafer

sawing for a period of ninety (90) days from the date of

Philips' delivery. If there are data sheet limits not

guaranteed, these will be separately indicated in the data

sheet. There are no post packing tests performed on

individual die or wafer. Philips Semiconductors has no

control of third party procedures in the sawing, handling,

packing or assembly of the die. Accordingly, Philips

Semiconductors assumes no liability for device

functionality or performance of the die or systems after

third party sawing, handling, packing or assembly of the

die. It is the responsibility of the customer to test and

qualify their application in which the die is used.

background image

© Philips Electronics N.V.

SCA

All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.

The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed

without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license

under patent- or other industrial or intellectual property rights.

Internet: http://www.semiconductors.philips.com

2000

70

Philips Semiconductors – a worldwide company

For all other countries apply to: Philips Semiconductors,

Marketing Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN,

The Netherlands, Fax. +31 40 27 24825

Argentina: see South America

Australia: 3 Figtree Drive, HOMEBUSH, NSW 2140,

Tel. +61 2 9704 8141, Fax. +61 2 9704 8139

Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213,

Tel. +43 1 60 101 1248, Fax. +43 1 60 101 1210

Belarus: Hotel Minsk Business Center, Bld. 3, r. 1211, Volodarski Str. 6,

220050 MINSK, Tel. +375 172 20 0733, Fax. +375 172 20 0773

Belgium: see The Netherlands

Brazil: see South America

Bulgaria: Philips Bulgaria Ltd., Energoproject, 15th floor,

51 James Bourchier Blvd., 1407 SOFIA,

Tel. +359 2 68 9211, Fax. +359 2 68 9102

Canada: PHILIPS SEMICONDUCTORS/COMPONENTS,

Tel. +1 800 234 7381, Fax. +1 800 943 0087

China/Hong Kong: 501 Hong Kong Industrial Technology Centre,

72 Tat Chee Avenue, Kowloon Tong, HONG KONG,

Tel. +852 2319 7888, Fax. +852 2319 7700

Colombia: see South America

Czech Republic: see Austria

Denmark: Sydhavnsgade 23, 1780 COPENHAGEN V,

Tel. +45 33 29 3333, Fax. +45 33 29 3905

Finland: Sinikalliontie 3, FIN-02630 ESPOO,

Tel. +358 9 615 800, Fax. +358 9 6158 0920

France: 51 Rue Carnot, BP317, 92156 SURESNES Cedex,

Tel. +33 1 4099 6161, Fax. +33 1 4099 6427

Germany: Hammerbrookstraße 69, D-20097 HAMBURG,

Tel. +49 40 2353 60, Fax. +49 40 2353 6300

Hungary: see Austria

India: Philips INDIA Ltd, Band Box Building, 2nd floor,

254-D, Dr. Annie Besant Road, Worli, MUMBAI 400 025,

Tel. +91 22 493 8541, Fax. +91 22 493 0966

Indonesia: PT Philips Development Corporation, Semiconductors Division,

Gedung Philips, Jl. Buncit Raya Kav.99-100, JAKARTA 12510,

Tel. +62 21 794 0040 ext. 2501, Fax. +62 21 794 0080

Ireland: Newstead, Clonskeagh, DUBLIN 14,

Tel. +353 1 7640 000, Fax. +353 1 7640 200

Israel: RAPAC Electronics, 7 Kehilat Saloniki St, PO Box 18053,

TEL AVIV 61180, Tel. +972 3 645 0444, Fax. +972 3 649 1007

Italy: PHILIPS SEMICONDUCTORS, Via Casati, 23 - 20052 MONZA (MI),

Tel. +39 039 203 6838, Fax +39 039 203 6800

Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku,

TOKYO 108-8507, Tel. +81 3 3740 5130, Fax. +81 3 3740 5057

Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL,

Tel. +82 2 709 1412, Fax. +82 2 709 1415

Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR,

Tel. +60 3 750 5214, Fax. +60 3 757 4880

Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905,

Tel. +9-5 800 234 7381, Fax +9-5 800 943 0087

Middle East: see Italy

Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB,

Tel. +31 40 27 82785, Fax. +31 40 27 88399

New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND,

Tel. +64 9 849 4160, Fax. +64 9 849 7811

Norway: Box 1, Manglerud 0612, OSLO,

Tel. +47 22 74 8000, Fax. +47 22 74 8341

Pakistan: see Singapore

Philippines: Philips Semiconductors Philippines Inc.,

106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI,

Metro MANILA, Tel. +63 2 816 6380, Fax. +63 2 817 3474

Poland: Al.Jerozolimskie 195 B, 02-222 WARSAW,

Tel. +48 22 5710 000, Fax. +48 22 5710 001

Portugal: see Spain

Romania: see Italy

Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW,

Tel. +7 095 755 6918, Fax. +7 095 755 6919

Singapore: Lorong 1, Toa Payoh, SINGAPORE 319762,

Tel. +65 350 2538, Fax. +65 251 6500

Slovakia: see Austria

Slovenia: see Italy

South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale,

2092 JOHANNESBURG, P.O. Box 58088 Newville 2114,

Tel. +27 11 471 5401, Fax. +27 11 471 5398

South America: Al. Vicente Pinzon, 173, 6th floor,

04547-130 SÃO PAULO, SP, Brazil,

Tel. +55 11 821 2333, Fax. +55 11 821 2382

Spain: Balmes 22, 08007 BARCELONA,

Tel. +34 93 301 6312, Fax. +34 93 301 4107

Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM,

Tel. +46 8 5985 2000, Fax. +46 8 5985 2745

Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH,

Tel. +41 1 488 2741 Fax. +41 1 488 3263

Taiwan: Philips Semiconductors, 5F, No. 96, Chien Kuo N. Rd., Sec. 1,

TAIPEI, Taiwan Tel. +886 2 2134 2451, Fax. +886 2 2134 2874

Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd.,

60/14 MOO 11, Bangna Trad Road KM. 3, Bagna, BANGKOK 10260,

Tel. +66 2 361 7910, Fax. +66 2 398 3447

Turkey: Yukari Dudullu, Org. San. Blg., 2.Cad. Nr. 28 81260 Umraniye,

ISTANBUL, Tel. +90 216 522 1500, Fax. +90 216 522 1813

Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7,

252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461

United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes,

MIDDLESEX UB3 5BX, Tel. +44 208 730 5000, Fax. +44 208 754 8421

United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,

Tel. +1 800 234 7381, Fax. +1 800 943 0087

Uruguay: see South America

Vietnam: see Singapore

Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,

Tel. +381 11 3341 299, Fax.+381 11 3342 553

Printed in The Netherlands

403512/01/pp

36

 Date of release:

2000 Nov 22

Document order number:

 9397 750 07415


Document Outline