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1

Data sheet acquired from Harris Semiconductor

SCHS208

Features

• Wide Analog-Input-Voltage Range . . . . . . . . . . 0V - 10V

• Low “ON” Resistance

- V

CC

 = 4.5V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25

- V

CC

 = 9V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15

• Fast Switching and Propagation Delay Times

• Low “OFF” Leakage Current

• Wide Operating Temperature Range  . . . -55

o

C to 125

o

C

• HC Types

- 2V to 10V Operation

- High Noise Immunity: N

IL

 = 30%, N

IH

 = 30% of V

CC

at V

CC

 = 5V and 10V

• HCT Types

- Direct LSTTL Input Logic Compatibility,

V

IL

= 0.8V (Max), V

IH

 = 2V (Min)

- CMOS Input Compatibility, I

l

1

µ

A at V

OL

, V

OH

Description

The Harris CD74HC4066 and CD74HCT4066 contains four

independent digitally controlled analog switches that use

silicon-gate CMOS technology to achieve operating speeds

similar to LSTTL with the low power consumption of

standard CMOS integrated circuits.

These switches feature the characteristic linear “ON”

resistance of the metal-gate CD4066B. Each switch is

turned on by a high-level voltage on its control input.

Pinout

CD74HC4066, CD74HCT4066

(PDIP, SOIC)

TOP VIEW

Ordering Information

PART NUMBER

TEMP. RANGE

(

o

C)

PACKAGE

PKG.

NO.

CD74HC4066E

-55 to 125

14 Ld PDIP

E14.3

CD74HCT4066E

-55 to 125

14 Ld PDIP

E14.3

CD74HC4066M

-55 to 125

14 Ld SOIC

M14.15

CD74HCT4066M

-55 to 125

14 Ld SOIC

M14.15

NOTES:

1. When ordering, use the entire part number. Add the suffix 96 to

obtain the variant in the tape and reel.

2. Wafer and die is available which meets all electrical

specifications. Please contact your local sales office or Harris

customer service for ordering information.

1Y

1Z

2Z

2Y

2E

3E

GND

V

CC

1E

4E

4Y

4Z

3Z

3Y

1

2

3

4

5

6

7

14

13

12

11

10

9

8

February 1998

CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.

Copyright

 ©

 Harris Corporation 1998

File Number

1777.1

CD74HC4066,

CD74HCT4066

High-Speed CMOS Logic

Quad Bilateral Switch

[ /Title

(CD74H

C4066,

CD74H

CT4066

)

/Subject

(High-

Speed

CMOS

Logic

Quad

background image

2

Functional Diagram

Logic Diagram

TRUTH TABLE

INPUT

nE

SWITCH

L

Off

H

On

NOTE:

H = High Level

L

= Low Level

1

2

4

3

9

10

11

8

13

5

12

6

4E

3E

2E

1E

1Y

1Z

2Y

2Z

3Y

3Z

4Y

4Z

GND = 7

V

CC

= 14

nY

nZ

nE

p

n

p

n

CD74HC4066, CD74HCT4066

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3

Absolute Maximum Ratings

Thermal Information

DC Supply Voltage, V

CC

HCT Types  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 7V

HC Types  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 10.5V

DC Input Diode Current, I

IK

For V

I

 < -0.5V or V

I

 > V

CC

 + 0.5V

. . . . . . . . . . . . . . . . . . . . . .±

20mA

DC Switch Current, I

O

 (Note 3)

For -0.5V < V

O

 < V

CC

 + 0.5V

. . . . . . . . . . . . . . . . . . . . . . . . . .±

25mA

DC Output Diode Current, I

OK

For V

O

 < -0.5V or V

O

 > V

CC

 + 0.5V

 . . . . . . . . . . . . . . . . . . . .±

20mA

DC Output Source or Sink Current per Output Pin, I

O

For V

O

 > -0.5V or V

O

 < V

CC

 + 0.5V

 . . . . . . . . . . . . . . . . . . . .±

25mA

DC V

CC

 or Ground Current, I

CC

 . . . . . . . . . . . . . . . . . . . . . . . . .±

50mA

Operating Conditions

Temperature Range, T

A

 . . . . . . . . . . . . . . . . . . . . . . -55

o

C to 125

o

C

Supply Voltage Range, V

CC

HC Types  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2V to 10V

HCT Types  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.5V to 5.5V

DC Input or Output Voltage, V

I

, V

O

 . . . . . . . . . . . . . . . . . 0V to V

CC

Input Rise and Fall Time

2V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1000ns (Max)

4.5V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500ns (Max)

6V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 400ns (Max)

Thermal Resistance (Typical, Note 4)

θ

JA

 (

o

C/W)

PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

90

SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

175

Maximum Junction Temperature (Hermetic Package or Die) . . . 175

o

C

Maximum Junction Temperature (Plastic Package) . . . . . . . . 150

o

C

Maximum Storage Temperature Range  . . . . . . . . . .-65

o

C to 150

o

C

Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300

o

C

(SOIC - Lead Tips Only)

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation

of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTES:

3. In certain applications, the external load-resistor current may include both V

CC

and signal-line components. To avoid drawing V

CC

current

when switch current flows into the transmission gate inputs, (terminals 1, 4, 8 and 11) the voltage drop across the bidirectional switch

must not exceed 0.6V (calculated from R

ON

values shown in the DC Electrical Specifications Table). No V

CC

current will flow through

R

L

if the switch current flows into terminals 2, 3, 9 and 10.

4.

θ

JA

 is measured with the component mounted on an evaluation PC board in free air.

DC Electrical Specifications

PARAMETER

SYMBOL

TEST

CONDITIONS

V

CC

 (V)

25

o

C

-40

o

C TO 85

o

C

-55

o

C TO 125

o

C

UNITS

V

I

(V)

V

IS

 (V)

MIN

TYP

MAX

MIN

MAX

MIN

MAX

HC TYPES

High Level Input

Voltage

V

IH

-

-

2

1.5

-

-

1.5

-

1.5

-

V

4.5

3.15

-

-

3.15

 -

3.15

-

V

9

6.3

-

-

6.3

-

6.3

-

V

Low Level Input

Voltage

V

IL

-

-

2

-

-

0.5

-

0.5

-

0.5

V

4.5

-

-

1.35

-

1.35

-

1.35

V

9

-

-

2.7

-

2.7

-

2.7

V

Input Leakage

Current

(Any Control)

I

IL

V

CC

 or

GND

-

10

-

-

±

0.1

-

±

1

-

±

1

µ

A

Off-Switch Leakage

Current

I

Z

V

IL

V

CC

 or

GND

10

-

-

±

0.1

-

±

1

-

±

1

µ

A

CD74HC4066, CD74HCT4066

background image

4

“ON” Resistance

I

O

 = 1mA

(Figure 1)

R

ON

V

CC

V

CC

 or

GND

4.5

-

25

80

-

106

-

128

6

-

20

75

-

94

-

113

9

-

15

60

-

78

-

95

V

CC

 to

GND

4.5

-

35

95

-

118

-

142

6

-

24

84

-

105

-

126

9

-

16

70

-

88

-

105

 “ON” Resistance

Between Any Two

Switches

R

ON

V

CC

-

4.5

-

1

-

-

-

-

-

6

-

0.75

-

-

-

-

-

9

-

0.5

-

-

-

-

-

Quiescent Device

Current

I

CC

V

CC

 or

GND

-

6

-

-

2

-

20

-

40

µ

A

10

-

-

16

-

160

-

320

µ

A

HCT TYPES

High Level Input

Voltage

V

IH

-

-

4.5 to

5.5

2

-

-

2

-

2

-

V

Low Level Input

Voltage

V

IL

-

-

4.5 to

5.5

-

-

0.8

-

0.8

-

0.8

V

Input Leakage

Current

(Any Control)

I

IL

V

CC

 or

GND

-

5.5

-

-

±

0.1

-

±

1

-

±

1

µ

A

Off-Switch Leakage

Current

I

Z

V

IL

V

CC

 or

GND

5.5

-

-

±

0.1

-

±

1

-

±

1

µ

A

“ON” Resistance

I

O

 = 1mA

(Figure 1)

R

ON

V

CC

V

CC

 or

GND

4.5

-

25

80

-

106

-

128

V

CC

 to

GND

4.5

-

35

95

-

118

-

142

 “ON” Resistance

Between Any Two

Switches

R

ON

V

CC

-

4.5

-

1

-

-

-

-

-

Quiescent Device

Current

I

CC

V

CC

 or

GND

-

5.5

-

-

2

-

20

-

40

µ

A

Additional Quiescent

Device Current Per

Input Pin: 1 Unit Load

(Note 5)

I

CC

V

CC

- 2.1

-

4.5 to

5.5

-

100

360

-

450

-

490

µ

A

NOTE:

5. For dual-supply systems theoretical worst case (V

I

 = 2.4V, V

CC

 = 5.5V) specification is 1.8mA.

DC Electrical Specifications

 (Continued)

PARAMETER

SYMBOL

TEST

CONDITIONS

V

CC

 (V)

25

o

C

-40

o

C TO 85

o

C

-55

o

C TO 125

o

C

UNITS

V

I

(V)

V

IS

 (V)

MIN

TYP

MAX

MIN

MAX

MIN

MAX

HCT Input Loading Table

INPUT

UNIT LOADS

All

1

NOTE: Unit Load is

I

CC

limit specified in DC Electrical Specifica-

tions table, e.g., 360

µ

A max at 25

o

C.

CD74HC4066, CD74HCT4066

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5

Switching Specifications

Input t

r

, t

f

 = 6ns

PARAMETER

SYMBOL

TEST

CONDITIONS

V

CC

(V)

25

o

C

-40

o

C TO 85

o

C

-55

o

C TO 125

o

C

UNITS

MIN

TYP

MAX

MIN

MAX

MIN

MAX

HC TYPES

Propagation Delay Time

Switch In to Out

t

PLH

, t

PHL

C

L

= 50pF

2

-

-

60

-

75

-

90

ns

4.5

-

-

12

-

15

-

18

ns

9

-

-

8

-

11

-

13

ns

C

L

= 15pF

5

-

4

-

-

-

-

-

ns

Propagation Delay Time

Switch Turn On Delay

t

PZH

, t

PZL

C

L

= 50pF

2

-

-

100

-

125

-

150

ns

4.5

-

-

20

-

25

-

30

ns

9

-

-

12

-

15

-

18

ns

C

L

= 15pF

5

-

8

-

-

-

-

-

ns

Propagation Delay Time

Switch Turn Off Delay

t

PHZ

, t

PLZ

C

L

= 50pF

2

-

-

150

-

190

-

225

ns

4.5

-

-

30

-

38

-

45

ns

9

-

-

24

-

30

-

36

ns

C

L

= 15pF

5

-

12

-

-

-

-

-

ns

Input (Control) Capacitance

C

I

-

-

-

-

10

-

10

-

10

pF

Power Dissipation Capacitance

(Notes 6, 7)

C

PD

-

5

-

25

-

-

-

-

-

pF

HCT TYPES

Propagation Delay Time

Switch In to Out

t

PLH

, t

PHL

C

L

= 50pF

4.5

-

-

12

-

15

-

18

ns

C

L

= 15pF

5

-

4

-

-

-

-

-

ns

Propagation Delay Time

Switch Turn On Delay

t

PZH

, t

PZL

C

L

= 50pF

4.5

-

-

24

-

30

-

36

ns

C

L

= 15pF

5

-

9

-

-

-

-

-

ns

Propagation Delay Time

Switch Turn Off Delay

t

PHZ

, t

PLZ

C

L

= 50pF

4.5

-

-

35

-

44

-

53

ns

C

L

= 15pF

5

-

14

-

-

-

-

-

ns

Input (Control) Capacitance

C

I

-

-

-

-

10

-

10

-

10

pF

Power Dissipation Capacitance

(Notes 6, 7)

C

PD

-

5

-

38

-

-

-

-

-

pF

NOTES:

6. C

PD

 is used to determine the dynamic power consumption, per package.

7. P

D

= C

PD

V

CC

2

f

i

+

Σ

(C

L

+ C

S

) V

CC

2

f

o

where f

i

= input frequency, f

o

= output frequency, C

L

= output load capacitance, C

S

= switch

capacitance, V

CC

 = supply voltage.

Analog Channel Specifications

T

A

 = 25

o

C

PARAMETER

TEST CONDITIONS

V

CC

 (V)

CD74HC4066

CD74HCT4066

UNITS

Switch Frequency Response Bandwidth at -3dB

Figure 2

Figure 5, Notes 8, 9

4.5

200

200

MHz

Cross Talk Between Any Two Switches Figure 3

Figure 4, Notes 9, 10

4.5

-72

-72

dB

Total Harmonic Distortion

Figure 6, 1kHz,

V

IS

 = 4V

P-P

4.5

0.022

0.023

%

Figure 6, 1kHz,

V

IS

 = 8V

P-P

9

0.008

N/A

%

CD74HC4066, CD74HCT4066

background image

6

Control to Switch Feedthrough Noise

Figure 7

4.5

200

130

mV

9

550

N/A

mV

Switch “OFF” Signal Feedthrough Figure 3

Figure 8, Notes 9, 10

4.5

-72

-72

dB

Switch Input Capacitance, C

S

-

5

5

pF

NOTES:

8. Adjust input level for 0dBm at output, f = 1MHz.

9. V

IS

 is centered at V

CC

/2.

10. Adjust input for 0dBm at V

IS

.

Analog Channel Specifications

T

A

 = 25

o

 (Continued)

PARAMETER

TEST CONDITIONS

V

CC

 (V)

CD74HC4066

CD74HCT4066

UNITS

Typical Performance Curves

FIGURE 1. TYPICAL “ON” RESISTANCE vs INPUT SIGNAL

VOLTAGE

FIGURE 2. SWITCH FREQUENCY RESPONSE, V

CC

 = 4.5V

FIGURE 3. SWITCH-OFF SIGNAL FEEDTHROUGH AND CROSSTALK vs FREQUENCY, V

CC

 = 4.5V

V

CC

 = 4.5V, PIN 1 TO 2

50

40

30

20

10

0

0

1

2

3

4

5

4.5

6

7

8

9

10

INPUT SIGNAL VOLTAGE, V

IS

 (V)

“ON” RESIST

ANCE, R

ON

 (

)

V

CC

 = 9V, PIN 1 TO 3

T

A

 = 25

o

C, GND = 0V

C

L

 = 10pF

V

CC

 = 4.5V

R

L

 = 50

T

A

 = 25

o

C

PIN 4 TO 3

0

-1

-2

-3

-4

CHANNEL-ON B

AND

WIDTH, dB

FREQUENCY, f (Hz)

10

4

10

5

10

6

10

7

10

8

C

L

 = 10pF

V

CC

 = 4.5V

R

L

 = 50

T

A

 = 25

o

C

PIN 4 TO 3

-20

-40

-60

-80

-100

CR

OSST

ALK, dB

FREQUENCY, f (Hz)

10

4

10

5

10

6

10

7

10

8

0

SWITCH-OFF SIGNAL FEEDTHR

OUGH, dB

CD74HC4066, CD74HCT4066

background image

7

Analog Test Circuits

FIGURE 4. CROSSTALK BETWEEN TWO SWITCHES TEST CIRCUIT

FIGURE 5. FREQUENCY RESPONSE TEST CIRCUIT

FIGURE 6. TOTAL HARMONIC DISTORTION TEST CIRCUIT

FIGURE 7. CONTROL-TO-SWITCH FEEDTHROUGH NOISE

TEST CIRCUIT

FIGURE 8. SWITCH OFF SIGNAL FEEDTHROUGH

V

CC

V

IS

0.1

µ

F

R

C

V

CC

/2

V

OS1

SWITCH

ON

V

CC

V

CC

/2

R

R

C

V

CC

/2

V

OS2

SWITCH

OFF

dB

METER

V

IS

f

IS

 = 1MHz SINEWAVE

R = 50

C = 10pF

R

V

CC

V

IS

0.1

µ

F

50

10pF

V

CC

/2

V

OS

SWITCH

ON

dB

METER

V

CC

V

IS

10

µ

F

10k

50pF

V

CC

/2

V

OS

SWITCH

ON

DISTORTION

METER

V

I

 = V

IH

f

IS

 = 1kHz TO 10kHz

V

IS

SINE

WAVE

SWITCH

ALTERNATING

ON AND OFF

t

r

, t

f

 6ns

f

CONT

 = 1MHz

50% DUTY

CYCLE

SCOPE

V

P-P

V

OS

E

V

OS

50pF

600

V

CC

/2

600

V

CC

/2

V

CC

V

CC

V

IS

0.1

µ

F

R

C

V

CC

/2

V

OS

SWITCH

OFF

dB

METER

R

V

CC

/2

V

C

 = V

IL

f

IS

 1MHz SINEWAVE

R = 50

C = 10pF

Test Circuits and Waveforms

FIGURE 9. HC TRANSITION TIMES AND PROPAGATION

DELAY TIMES, COMBINATION LOGIC

FIGURE 10. HCT TRANSITION TIMES AND PROPAGATION

DELAY TIMES, COMBINATION LOGIC

t

PHL

t

PLH

t

THL

t

TLH

90%

50%

10%

50%

10%

INVERTING

OUTPUT

INPUT

GND

V

CC

t

r

 = 6ns

t

f

 = 6ns

90%

t

PHL

t

PLH

t

THL

t

TLH

2.7V

1.3V

0.3V

1.3V

10%

INVERTING

OUTPUT

INPUT

GND

3V

t

r

 = 6ns

t

f

 = 6ns

90%

CD74HC4066, CD74HCT4066

background image

IMPORTANT NOTICE

Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue

any product or service without notice, and advise customers to obtain the latest version of relevant information

to verify, before placing orders, that information being relied on is current and complete. All products are sold

subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those

pertaining to warranty, patent infringement, and limitation of liability.

TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in

accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent

TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily

performed, except those mandated by government requirements.

CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF

DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL

APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR

WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER

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 1999, Texas Instruments Incorporated