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SN74CBT16233

16-BIT 1-OF-2 FET MULTIPLEXER/DEMULTIPLEXER

 

 

SCDS010H – MAY 1995 – REVISED OCTOBER 1998

1

POST OFFICE BOX 655303 

 DALLAS, TEXAS 75265

D

5-

 Switch Connection Between Two Ports

D

TTL-Compatible Input Levels

D

Package Options Include Plastic Thin

Shrink Small-Outline (DGG), Thin Very

Small-Outline (DGV), and 300-mil Shrink

Small-Outline (DL) Packages

description

The SN74CBT16233 is a 16-bit 1-of-2 FET

multiplexer/demultiplexer used in applications in

which two separate data paths must be

multiplexed onto, or demultiplexed from, a single

path. This device can be used for memory

interleaving, where two different banks of memory

need to be addressed simultaneously. The device

can be used as two 8-bit to 16-bit multiplexers or

as one 16-bit to 32-bit multiplexer.

Two select (SEL1 and SEL2) inputs control the

data flow. When the TEST inputs are asserted, the

A port is connected to both the B1 and the B2

ports. SEL1, SEL2, and the TEST inputs can be

driven with a 5-V CMOS, a 5-V TTL, or a

low-voltage TTL driver.

The device is specified by design not to have

through current when switching directions.

The SN74CBT16233 is characterized for

operation from 0

°

C to 70

°

C.

FUNCTION TABLE

(each multiplexer/demultiplexer)

INPUTS

FUNCTION

SEL

TEST

FUNCTION

L

L

A = B1

H

L

A = B2

X

H

A = B1 and A = B2

DGG, DGV, OR DL PACKAGE

(TOP VIEW)

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

56

55

54

53

52

51

50

49

48

47

46

45

44

43

42

41

40

39

38

37

36

35

34

33

32

31

30

29

1A

2B1

2B2

3A

4B1

4B2

5A

6B1

6B2

7A

8B1

8B2

GND

V

CC

9A

10B1

10B2

11A

12B1

12B2

13A

14B1

14B2

15A

16B1

16B2

TEST1

TEST2

1B1

1B2

2A

3B1

3B2

4A

5B1

5B2

6A

7B1

7B2

8A

GND

V

CC

9B1

9B2

10A

11B1

11B2

12A

13B1

13B2

14A

15B1

15B2

16A

SEL1

SEL2

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

Copyright 

©

 1998, Texas Instruments Incorporated

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

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SN74CBT16233

16-BIT 1-OF-2 FET MULTIPLEXER/DEMULTIPLEXER

 

 

SCDS010H – MAY 1995 – REVISED OCTOBER 1998

2

POST OFFICE BOX 655303 

 DALLAS, TEXAS 75265

logic diagram (positive logic)

8B1

1B1

8A

1A

SEL1

1B2

8B2

TEST1

1

45

30

27

56

55

11

12

16B1

9B1

16A

9A

SEL2

9B2

16B2

TEST2

15

31

29

28

42

41

25

26

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

Supply voltage range, V

CC

 

–0.5 V to 7 V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

Input voltage range, V

I

 (see Note 1) 

–0.5 V to V

CC

 + 0.5 V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

Continuous channel current

128 mA

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

Input clamp current, I

IK 

(V

< 0) 

–50 mA

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

Package thermal impedance, 

θ

JA

 (see Note 2): DGG package

81

°

C/W

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

DGV package

86

°

C/W

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

DL package

74

°

C/W

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

Storage temperature range, T

stg

 –65

°

C to 150

°

C

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and

functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not

implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES:

1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.

2. The package thermal impedance is calculated in accordance with JESD 51.

recommended operating conditions (see Note 3)

MIN

MAX

UNIT

VCC

Supply voltage

4.75

5.25

V

VIH

High-level control input voltage

2

V

VIL

Low-level control input voltage

0.8

V

TA

Operating free-air temperature

0

70

°

C

NOTE  3: All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,

Implications of Slow or Floating CMOS Inputs, literature number SCBA004.

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SN74CBT16233

16-BIT 1-OF-2 FET MULTIPLEXER/DEMULTIPLEXER

 

 

SCDS010H – MAY 1995 – REVISED OCTOBER 1998

3

POST OFFICE BOX 655303 

 DALLAS, TEXAS 75265

electrical characteristics over recommended operating free-air temperature range (unless

otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP†

MAX

UNIT

VIK

VCC = 4.75 V,

II = –18 mA

–1.2

V

II

VCC = 0,

VI = 5.25 V

10

µ

A

II

VCC = 5.25 V,

VI = 5.25 V or GND

±

1

µ

A

ICC

VCC = 5.25 V,

IO = 0,

VI = VCC or GND

3

µ

A

ICC‡

Control inputs

VCC = 5.5 V,

One input at 3.4 V,

Other inputs at VCC or GND

2.5

mA

Ci

Control inputs

VI = 3 V or 0

4.5

pF

Cio(OFF)

VO = 3 V or 0

4

pF

§

VI = 0

II = 64 mA

5

7

ron§

VCC = 4.75 V

VI = 0

II = 30 mA

5

7

VI = 2.4 V,

II = 15 mA

7

12

† All typical values are at VCC = 5 V, TA = 25

°

C.

‡ This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND.

§ Measured by the voltage drop between A and B terminals at the indicated current through the switch. On-state resistance is determined by the

lower of the voltages of the two (A or B) terminals.

switching characteristics over recommended operating free-air temperature range, C

L

 = 50 pF

(unless otherwise noted) (see Figure 1)

PARAMETER

FROM

TO

MIN

MAX

UNIT

PARAMETER

(INPUT)

(OUTPUT)

MIN

MAX

UNIT

tpd¶

A or B

B or A

0.25

ns

tpd

SEL

A

1.6

5.3

ns

ten

TEST or SEL

B

1.3

5.2

ns

tdis

TEST or SEL

B

1

5.3

ns

¶ The propagation delay is the calculated RC time constant of the typical on-state resistance of the switch and the specified load capacitance, when

driven by an ideal voltage source (zero output impedance).

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SN74CBT16233

16-BIT 1-OF-2 FET MULTIPLEXER/DEMULTIPLEXER

 

 

SCDS010H – MAY 1995 – REVISED OCTOBER 1998

4

POST OFFICE BOX 655303 

 DALLAS, TEXAS 75265

PARAMETER MEASUREMENT INFORMATION

VOH

VOL

From Output

Under Test

CL = 50 pF

(see Note A)

LOAD CIRCUIT

S1

7 V

Open

GND

500

 Ω

500

 Ω

tPLH

tPHL

Output

Control

(low-level

enabling)

Output

Waveform 1

S1 at 7 V

(see Note B)

Output

Waveform 2

S1 at Open

(see Note B)

tPZL

tPZH

tPLZ

tPHZ

1.5 V

1.5 V

1.5 V

1.5 V

3 V

0 V

1.5 V

1.5 V

VOH

VOL

0 V

1.5 V

VOL + 0.3 V

1.5 V

VOH – 0.3 V

0 V

Input

3 V

3.5 V

VOLTAGE WAVEFORMS

PROPAGATION DELAY TIMES

VOLTAGE WAVEFORMS

ENABLE AND DISABLE TIMES

Output

tpd

tPLZ/tPZL

tPHZ/tPZH

Open

7 V

Open

TEST

S1

NOTES: A. CL includes probe and jig capacitance.

B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.

Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.

C. All input pulses are supplied by generators having the following characteristics: PRR 

 10 MHz, ZO = 50 

, tr 

 2.5 ns, tf 

 2.5 ns.

D. The outputs are measured one at a time with one transition per measurement.

E. tPLZ and tPHZ are the same as tdis.

F. tPZL and tPZH are the same as ten.

G. tPLH and tPHL are the same as tpd.

Figure 1. Load Circuit and Voltage Waveforms

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TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in

accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent

TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily

performed, except those mandated by government requirements.

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Copyright 

©

 1998, Texas Instruments Incorporated