background image

TLV2460, TLV2461, TLV2462, TLV2463, TLV2464, TLV2465, TLV246xA

FAMILY OF LOW-POWER RAIL-TO-RAIL INPUT/OUTPUT

OPERATIONAL AMPLIFIERS WITH SHUTDOWN

 

SLOS220F – JULY 1998 – REVISED OCTOBER 1999

1

POST OFFICE BOX 655303 

 DALLAS, TEXAS 75265

D

Input Common-Mode Range Exceeds Both

Supply Rails . . .   –  0.2V to V

DD+

 + 0.2V

D

Gain Bandwidth Product . . . 6.4MHz

D

Supply Current . . . 500

µ

A/channel

D

Input Offset Voltage . . . 100 

µ

V

D

Input Noise Voltage . . . 11nV/

Hz

D

Rail-to-Rail Output Swing

D

Slew Rate . . . 1.6 V/

µ

s

D

±

90mA Output Drive Capability

D

Micropower Shutdown Mode

(TLV2460/3/5) . . . 0.3 

µ

A/channel

D

Available in 5- or 6-pin SOT23 and

8- or 10-Pin MSOP

D

Characterized From T

= –40

°

C to 125

°

C

D

Universal Op Amp EVM

     

description

The TLV246x is a family of low-power rail-to-rail input/output operational amplifiers specifically designed for

portable applications. The input common-mode voltage range extends beyond the supply rails for maximum

dynamic range in low-voltage systems. The amplifier output has rail-to-rail performance with high-output-drive

capability, solving one of the limitations of older rail-to-rail input/output operational amplifiers. This rail-to-rail

dynamic range and high output drive make the TLV246x ideal for buffering analog-to-digital converters.

The operational amplifier has 6.4 MHz of bandwidth and 1.6 V/

µ

s of slew rate with only 500 

µ

A of supply current,

providing good ac performance with low power consumption. Three members of the family offer a shutdown

terminal, which places the amplifier in an ultra-low supply current mode (I

DD 

= 0.3 

µ

A/ch). While in shutdown,

the operational-amplifier output is placed in a high-impedance state. DC applications are also well served with

an input noise voltage of 11 nV/

Hz and input offset voltage of 100 

µ

V.

This family is available in the low-profile SOT23, MSOP, and TSSOP packages. The TLV2460 is the first

rail-to-rail input/output operational amplifier with shutdown available in the 6-pin SOT23, making it perfect for

high-density circuits. The family is specified over an expanded temperature range (T

A

 = – 40

°

C to 125

°

C) for

use in industrial control and automotive systems.

FAMILY PACKAGE TABLE

DEVICE

NO OF Ch

PACKAGE TYPES

SHUTDOWN

UNIVERSAL

DEVICE

NO. OF Ch

PDIP

SOIC

SOT-23

TSSOP

MSOP

SHUTDOWN

EVM BOARD

TLV2460

1

8

8

6

Yes

TLV2461

1

8

8

5

TLV2462

2

8

8

8

Refer to the EVM

Selection Guide

TLV2463

2

14

14

10

Yes

Selection Guide

(Lit# SLOU060)

TLV2464

4

14

14

14

(Lit# SLOU060)

TLV2465

4

16

16

16

Yes

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

This document contains information on products in more than one phase

of development. The status of each device is indicated on the page(s)

specifying its electrical characteristics.

Copyright 

©

 1999, Texas Instruments Incorporated

3

2

4

6

(TOP VIEW)

1

OUT

GND

IN+

VDD+

IN –

TLV2460

DBV PACKAGE

5

SHDN

background image

TLV2460, TLV2461, TLV2462, TLV2463, TLV2464, TLV2465, TLV246xA

FAMILY OF LOW-POWER RAIL-TO-RAIL INPUT/OUTPUT

OPERATIONAL AMPLIFIERS WITH SHUTDOWN

 

SLOS220F – JULY 1998 – REVISED OCTOBER 1999

2

POST OFFICE BOX 655303 

 DALLAS, TEXAS 75265

TLV2460 and TLV2461 AVAILABLE OPTIONS

V

max

PACKAGED DEVICES

CHIP FORM‡

TA

VIOmax

AT 25

°

C

SMALL OUTLINE

(D)

SOT-23†

(DBV)

PLASTIC DIP

(P)

CHIP FORM‡

(Y)

0

°

C to 70

°

C

2000 

µ

V

TLV2460CD

TLV2461CD

TLV2460CDBV

TLV2461CDBV

TLV2460CP

TLV2461CP

TLV2460Y

TLV2461Y

- 40

°

C to 125

°

C

2000 

µ

V

TLV2460ID

TLV2461ID

TLV2460IDBV

TLV2461IDBV

TLV2460IP

TLV2461IP

- 40

°

C to 125

°

C

1500 

µ

V

TLV2460AID

TLV2461AID

TLV2460AIP

TLV2461AIP

† This package is available taped and reeled. To order this packaging option, add an R suffix to the part number (e.g., TLV2460CDR).

‡ Chip forms are tested at TA = 25

°

C only.

TLV2462 and TLV2463 AVAILABLE OPTIONS

V

max

PACKAGED DEVICES

CHIP FORM‡

TA

VIOmax

AT 25

°

C

SMALL OUTLINE†

(D)

MSOP

(DGK)

MSOP†

(DGS)

PLASTIC DIP

(N)

PLASTIC DIP

(P)

CHIP FORM‡

(Y)

0

°

C to

70

°

C

2000 

µ

V

TLV2462CD

TLV2463CD

TLV2462CDGK

TLV2463CDGS

TLV2463CN

TLV2462CP

TLV2462Y

TLV2463Y

– 40

°

C to

2000 

µ

V

TLV2462ID

TLV2463ID

TLV2462IDGK

TLV2463IDGS

TLV2463IN

TLV2462IP

125

°

C

1500 

µ

V

TLV2462AID

TLV2463AID

TLV2463AIN

TLV2462AIP

† This package is available taped and reeled. To order this packaging option, add an R suffix to the part number (e.g., TLV2462CDR).

‡ Chip forms are tested at TA = 25

°

C only.

TLV2464 and TLV2465 AVAILABLE OPTIONS

V

max

PACKAGED DEVICES

CHIP FORM‡

TA

VIOmax

AT 25

°

C

SMALL OUTLINE

(D)

PLASTIC DIP

(N)

TSSOP

(PW)

CHIP FORM‡

(Y)

0

°

C to 70

°

C

2000 

µ

V

TLV2464CD

TLV2465CD

TLV2464CN

TLV2465CN

TLV2464CPW

TLV2465CPW

TLV2464Y

TLV2465Y

– 40

°

C to 125

°

C

2000 

µ

V

TLV2464ID

TLV2465ID

TLV2464IN

TLV2465IN

TLV2464IPW

TLV2465IPW

– 40

°

C to 125

°

C

1500 

µ

V

TLV2464AID

TLV2465AID

TLV2464AIN

TLV2465AIN

TLV2464AIPW

TLV2465AIPW

† This package is available taped and reeled. To order this packaging option, add an R suffix to the part number

(e.g., TLV2464CDR).

‡ Chip forms are tested at TA = 25

°

C only.

SOT-23 AND MSOP DEVICE SYMBOLS

DEVICE TYPE

NO. OF 

TERMINALS

PACKAGE NAME

SYMBOL

6 Pin

TLV2460CDBV

VAOC

SOT 23

6 Pin

TLV2460IDBV

VAOI

SOT-23

5 Pin

TLV2461CDBV

VAPC

5 Pin

TLV2461IDBV

VAPI

8 Pin

TLV2462CDGK

xxTIAAI

MSOP

8 Pin

TLV2462IDGK

xxTIAAJ

MSOP

10 Pin

TLV2463CDGS

xxTIAAK

10 Pin

TLV2463IDGS

xxTIAAL

background image

TLV2460, TLV2461, TLV2462, TLV2463, TLV2464, TLV2465, TLV246xA

FAMILY OF LOW-POWER RAIL-TO-RAIL INPUT/OUTPUT

OPERATIONAL AMPLIFIERS WITH SHUTDOWN

 

SLOS220F – JULY 1998 – REVISED OCTOBER 1999

3

POST OFFICE BOX 655303 

 DALLAS, TEXAS 75265

TLV246x PACKAGE PINOUTS

1

2

3

4

5

10

9

8

7

6

1OUT

1IN –

1IN+

GND

1SHDN

V

DD

+

2OUT

2IN –

2IN+

2SHDN

3

2

4

5

(TOP VIEW)

1

OUT

GND

IN+

VDD+

IN –

TLV2461

DBV PACKAGE

3

2

4

6

(TOP VIEW)

1

OUT

GND

IN+

VDD+

IN –

TLV2460

DBV PACKAGE

5

SHDN

TLV2463

DGS PACKAGE

(TOP VIEW)

NC – No internal connection

1

2

3

5

6

7

14

13

12

11

10

9

8

1OUT

1IN –

1IN+

GND

NC

1SHDN

NC

V

DD

+

2OUT

2IN –

2IN+

NC

2SHDN

NC

(TOP VIEW)

TLV2463

D OR N PACKAGE

1

2

3

5

6

7

14

13

12

11

10

9

8

1OUT

1IN –

1IN+

V

DD

+

2IN+

2IN –

2OUT

4OUT

4IN –

4IN+

GND

3IN+

3IN –

3OUT

(TOP VIEW)

TLV2464

D, N, OR PWP PACKAGE

1

2

3

5

6

7

8

16

15

14

13

12

11

10

9

1OUT

1IN –

1IN+

V

DD

+

2IN+

2IN –

2OUT

1/2SHDN

4OUT

4IN –

4IN+

GND

3IN +

3IN–

3OUT

3/4SHDN

(TOP VIEW)

TLV2465

D, N, OR PWP PACKAGE

1

2

3

4

8

7

6

5

1OUT

1IN –

1IN +

GND

V

DD

+

2OUT

2IN –

2IN+

TLV2462

D, DGK, OR P PACKAGE

(TOP VIEW)

1

2

3

4

8

7

6

5

NC

IN –

IN +

GND

SHDN

V

DD

+

OUT

NC

TLV2460

D OR P PACKAGE

(TOP VIEW)

1

2

3

4

8

7

6

5

NC

IN –

IN +

GND

NC

V

DD

+

OUT

NC

TLV2461

D OR P PACKAGE

(TOP VIEW)

background image

TLV2460, TLV2461, TLV2462, TLV2463, TLV2464, TLV2465, TLV246xA

FAMILY OF LOW-POWER RAIL-TO-RAIL INPUT/OUTPUT

OPERATIONAL AMPLIFIERS WITH SHUTDOWN

 

SLOS220F – JULY 1998 – REVISED OCTOBER 1999

4

POST OFFICE BOX 655303 

 DALLAS, TEXAS 75265

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

Supply voltage, V

DD

 (see Note 1) 

6 V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

Differential input voltage, V

ID

 

V

DD

 – 0.2 V to V

DD

 + 0.2 V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

Input current, I

I

 (any input) 

±

 200 mA

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

Output current, I

O

 

±

 175 mA

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

Total input current, I

I

 (into V

DD +

) 175 

mA

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

Total output current, I

O

 (out of GND) 

175 mA

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

Continuous total power dissipation 

See Dissipation Rating Table

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

Operating free-air temperature range, T

A

: C suffix 

0

°

C to 70

°

C

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

I suffix 

– 40

°

C to 125

°

C

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

Maximum junction temperature, T

J

 150

°

C

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

Storage temperature range, T

stg

  – 65

°

C to 150

°

C

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 

260

°

C

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and

functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not

implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTE 1: All voltage values, except differential voltages, are with respect to GND.

DISSIPATION RATING TABLE

PACKAGE

Θ

JC

Θ

JA

TA 

 25

°

C

PACKAGE

JC

(

°

C/W)

JA

(

°

C/W)

A

POWER RATING

D (8)

38.3

176

725 mW

D (14)

26.9

122.6

725 mW

D (16)

25.7

114.7

725 mW

DBV (5)

55

324.1

437 mW

DBV (6)

55

294.3

437 mW

DGK

54.23

259.96

424 mW

DGS

54.1

257.71

424 mW

N (14)

32

78

1150 mW

N (16)

32

78

1150 mW

P

41

104

1000 mW

PW (14)

29.3

173.6

700 mW

PW (16)

28.7

161.4

700 mW

recommended operating conditions

MIN

MAX

UNIT

Supply voltage VDD

Single supply

2.7

6

V

Supply voltage, VDD

Split supply

±

1.35

±

3

V

Common-mode input voltage range, VICR

GND

VDD+

V

Operating free air temperature TA

C-suffix

0

70

°

C

Operating free-air temperature, TA

I-suffix

– 40

125

°

C

background image

TLV2460, TLV2461, TLV2462, TLV2463, TLV2464, TLV2465, TLV246xA

FAMILY OF LOW-POWER RAIL-TO-RAIL INPUT/OUTPUT

OPERATIONAL AMPLIFIERS WITH SHUTDOWN

 

SLOS220F – JULY 1998 – REVISED OCTOBER 1999

5

POST OFFICE BOX 655303 

 DALLAS, TEXAS 75265

electrical characteristics at specified free-air temperature, V

DD

 = 3 V (unless otherwise noted)

PARAMETER

TEST CONDITIONS

TA†

TLV246x

UNIT

PARAMETER

TEST CONDITIONS

TA†

MIN

TYP

MAX

UNIT

VIO

Input offset voltage (TLV246x)

V

1

V

25

°

C

100

2000

µ

V

VIO

Input offset voltage (TLV246x)

V

1

V

Full range

2200

µ

V

VIO

Input offset voltage (TLV246xA)

VDD = 

±

1.5 V,

VO = 0,

25

°

C

150

1500

µ

V

VIO

Input offset voltage (TLV246xA)

VIC = 0,

O

RS = 50 

Full range

1700

µ

V

α

VIO

Temperature coefficient of input offset

2

µ

V/

°

C

α

VIO

voltage

2

µ

V/

°

C

V

1

V

25

°

C

2.8

7

IIO

Input offset current

VDD =

±

1 5 V

TLV246xC

Full range

20

nA

VDD = 

±

1.5 V,

VIC = 0, 

TLV246xI

Full range

75

IC

,

VO = 0,

R

50

25

°

C

4.4

14

IIB

Input bias current

RS = 50 

TLV246xC

Full range

25

nA

TLV246xI

Full range

75

VICR

Common mode input voltage range

CMRR > 66 dB

RS = 50 

25

°

C

– 0.2

to

3.2

V

VICR

Common-mode input voltage range

CMRR > 60 dB

RS = 50 

Full range

– 0.2

to

3.2

V

IOH = 2 5 mA

25

°

C

2.9

VOH

High level output voltage

IOH = – 2.5 mA

Full range

2.8

V

VOH

High-level output voltage

IOH = 10 mA

25

°

C

2.7

V

IOH = – 10 mA

Full range

2.5

VIC = 1 5 V

IOL = 2 5 mA

25

°

C

0.1

VOL

Low level output voltage

VIC = 1.5 V,

IOL = 2.5 mA

Full range

0.2

V

VOL

Low-level output voltage

VIC = 1 5 V

IOL = 10 mA

25

°

C

0.3

V

VIC = 1.5 V,

IOL = 10 mA

Full range

0.5

Sourcing

25

°

C

50

IOS

Short circuit output current

Sourcing

Full range

20

mA

IOS

Short-circuit output current

Sinking

25

°

C

40

mA

Sinking

Full range

20

IO

Output current

25

°

C

±

30

mA

AVD

Large-signal differential voltage 

RL = 10 k

25

°

C

90

105

dB

AVD

g

g

g

amplification

RL = 10 k

Full range

89

dB

ri(d)

Differential input resistance

25

°

C

109

ci(c)

Common-mode input capacitance

f = 10 kHz

25

°

C

7

pF

zo

Closed-loop output impedance

f = 100 kHz,

AV = 10

25

°

C

33

V

0 2 V t 3 2 V

25

°

C

66

80

CMRR

Common-mode rejection ratio

VICR = –0.2 V to 3.2 V,

RS = 50

TLV246xC

Full range

64

dB

RS = 50

TLV246xI

Full range

60

VDD = 2.7 V to 6 V,

VIC = VDD /2,

25

°

C

80

85

kSVR

Supply voltage rejection ratio

DD

,

No load

IC

DD

,

Full range

75

dB

kSVR

y

g

j

(

VDD  /

VIO)

VDD = 3 V to 5 V,

VIC = VDD /2,

25

°

C

85

95

dB

DD

,

No load

IC

DD

,

Full range

80

† Full range is 0

°

C to 70

°

C for the C suffix and –40

°

C to 125

°

C for the I suffix. If not specified, full range is – 40

°

C to 125

°

C.

background image

TLV2460, TLV2461, TLV2462, TLV2463, TLV2464, TLV2465, TLV246xA

FAMILY OF LOW-POWER RAIL-TO-RAIL INPUT/OUTPUT

OPERATIONAL AMPLIFIERS WITH SHUTDOWN

 

SLOS220F – JULY 1998 – REVISED OCTOBER 1999

6

POST OFFICE BOX 655303 

 DALLAS, TEXAS 75265

electrical characteristics at specified free-air temperature, V

DD

 = 3 V (unless otherwise noted)

(continued)

PARAMETER

TEST CONDITIONS

TA†

TLV246x

UNIT

PARAMETER

TEST CONDITIONS

TA†

MIN

TYP

MAX

UNIT

IDD

Supply current (per channels)

VO = 1.5 V, 

No load,

25

°

C

0.5

0.575

mA

IDD

Supply current (per channels)

O

,

SHDN > 1.02 V

,

Full range

0.9

mA

V(ON)

Turnon voltage level

AV = 1

Channel 1

25

°

C

1.021

V

V(ON)

Turnon voltage level

AV = 1

Channel 2

25

°

C

1.02

V

V(OFF)

Turnoff voltage level

AV = 1

Channel 1

25

°

C

0.822

V

V(OFF)

Turnoff voltage level

AV = 1

Channel 2

25

°

C

0.817

V

IDD(SHDN)

Supply current in shutdown

SHDN < 0.8 V,

25

°

C

0.3

µ

A

IDD(SHDN)

y

(TLV2460, TLV2463, TLV2465)

Per channel in shutdown

Full range

2.5

µ

A

† Full range is 0

°

C to 70

°

C for the C suffix and –40

°

C to 125

°

C for the I suffix. If not specified, full range is – 40

°

C to 125

°

C.

operating characteristics at specified free-air temperature, V

DD

 = 3 V (unless otherwise noted)

PARAMETER

TEST CONDITIONS

TA†

TLV246x

UNIT

PARAMETER

TEST CONDITIONS

TA†

MIN

TYP

MAX

UNIT

VO(PP) = 2 V

CL = 160 pF

25

°

C

1

1.6

SR

Slew rate at unity gain

VO(PP) = 2 V,

RL = 10 k

CL = 160 pF,

Full

range

0.8

V/

µ

s

V

Equivalent input noise voltage

f = 100 Hz

25

°

C

16

nV/

Hz

Vn

Equivalent input noise voltage

f = 1 kHz

25

°

C

11

nV/

Hz

In

Equivalent input noise current

f = 1 kHz

25

°

C

0.13

pA /

Hz

VO(PP) = 2 V,

AV = 1

0.006%

THD + N

Total harmonic distortion plus noise

VO(PP) = 2 V,

RL = 10 k

,

AV = 10

25

°

C

0.02%

f = 1 kHz

AV = 100

0.08%

Both channels

7.6

t(on)

Amplifier turnon time

AV = 1,

RL = 10 k

Channel 1 only,

Channel 2 on

25

°

C

7.65

µ

s

(

)

RL = 10 k

Channel 2 only,

Channel 1 on

7.25

Both channels

333

t(off)

Amplifier turnoff time

AV = 1,

RL = 10 k

Channel 1 only,

Channel 2 on

25

°

C

328

ns

(

)

RL = 10 k

Channel 2 only,

Channel 1 on

329

Gain-bandwidth product

f = 10 kHz, 

CL = 160 pF

RL = 10 k

,

25

°

C

5.2

MHz

V(STEP)PP = 2 V,

AV = –1,

0.1%

1.47

t

Settling time

V

,

CL = 10 pF,

RL = 10 k

0.01%

25

°

C

1.78

µ

s

ts

Settling time

V(STEP)PP = 2 V,

AV = –1,

0.1%

25

°

C

1.77

µ

s

V

,

CL = 56 pF,

RL = 10 k

0.01%

1.98

φ

m

Phase margin at unity gain

RL = 10 k

CL = 160 pF

25

°

C

44

°

Gain margin

RL = 10 k

,

CL = 160 pF

25

°

C

7

dB

† Full range is 0

°

C to 70

°

C for the C suffix and –40

°

C to 125

°

C for the I suffix. If not specified, full range is – 40

°

C to 125

°

C.

background image

TLV2460, TLV2461, TLV2462, TLV2463, TLV2464, TLV2465, TLV246xA

FAMILY OF LOW-POWER RAIL-TO-RAIL INPUT/OUTPUT

OPERATIONAL AMPLIFIERS WITH SHUTDOWN

 

SLOS220F – JULY 1998 – REVISED OCTOBER 1999

7

POST OFFICE BOX 655303 

 DALLAS, TEXAS 75265

electrical characteristics at specified free-air temperature, V

DD

 = 5 V (unless otherwise noted)

PARAMETER

TEST CONDITIONS

TA†

TLV246x

UNIT

PARAMETER

TEST CONDITIONS

TA†

MIN

TYP

MAX

UNIT

VIO

Input offset voltage (TLV246x)

V

2

V

V

0

25

°

C

150

2000

µ

V

VIO

Input offset voltage (TLV246x)

V

2

V

V

0

Full range

2200

µ

V

VIO

Input offset voltage (TLV246xA)

VDD = 

±

2.5 V,

VO = 0,

25

°

C

150

1500

µ

V

VIO

Input offset voltage (TLV246xA)

VIC = 0,

O

RS = 50 

Full range

1700

µ

V

α

VIO

Temperature coefficient of input offset

25

°

C

2

µ

V/

°

C

α

VIO

voltage

25

°

C

2

µ

V/

°

C

V

2

V

25

°

C

0.3

7

IIO

Input offset current

VDD =

±

2 5 V

TLV246xC

Full range

15

nA

VDD = 

±

2.5 V,

VIC = 0, 

TLV246xI

Full range

60

IC

,

VO = 0,

R

50

25

°

C

1.3

14

IIB

Input bias current

RS = 50 

TLV246xC

Full range

30

nA

TLV246xI

Full range

60

VICR

Common mode input voltage range

CMRR > 71 dB,

RS = 50 

25

°

C

– 0.2

to

5.2

V

VICR

Common-mode input voltage range

CMRR > 60 dB,

RS = 50 

Full range

0

to

5

V

IOH = 2 5 mA

25

°

C

4.9

VOH

High level output voltage

IOH = – 2.5 mA

Full range

4.8

V

VOH

High-level output voltage

IOH = 10 mA

25

°

C

4.8

V

IOH = – 10 mA

Full range

4.7

VIC = 2 5 V

IOL = 2 5 mA

25

°

C

0.1

VOL

Low level output voltage

VIC = 2.5 V,

IOL = 2.5 mA

Full range

0.2

V

VOL

Low-level output voltage

VIC = 2 5 V

IOL = 10 mA

25

°

C

0.2

V

VIC = 2.5 V,

IOL = 10 mA

Full range

0.3

Sourcing

25

°

C

145

IOS

Short circuit output current

Sourcing

Full range

60

mA

IOS

Short-circuit output current

Sinking

25

°

C

100

mA

Sinking

Full range

60

IO

Output current

25

°

C

±

90

mA

AVD

Large-signal differential voltage 

VIC = 2.5 V,

RL = 10 k

,

25

°

C

92

109

dB

AVD

g

g

g

amplification

IC

,

VO = 1 V to 4 V

L

,

Full range

90

dB

ri(d)

Differential input resistance

25

°

C

109

ci(c)

Common-mode input capacitance

f = 10 kHz

25

°

C

7

pF

zo

Closed-loop output impedance

f = 100 kHz,

AV = 10

25

°

C

29

V

0 2 V t 5 2 V

25

°

C

71

85

CMRR

Common-mode rejection ratio

VICR = –0.2 V to 5.2 V,

RS = 50

TLV246xC

Full range

69

dB

RS = 50

TLV246xI

Full range

60

VDD = 2.7 V to 6 V,

VIC = VDD /2,

25

°

C

80

85

dB

kSVR

Supply voltage rejection ratio

DD

,

No load

IC

DD

,

Full range

75

dB

kSVR

y

g

j

(

VDD  /

VIO)

VDD = 3 V to 5 V,

VIC = VDD /2,

25

°

C

85

95

dB

DD

,

No load

IC

DD

,

Full range

80

dB

† Full range is 0

°

C to 70

°

C for the C suffix and –40

°

C to 125

°

C for the I suffix. If not specified, full range is – 40

°

C to 125

°

C.

background image

TLV2460, TLV2461, TLV2462, TLV2463, TLV2464, TLV2465, TLV246xA

FAMILY OF LOW-POWER RAIL-TO-RAIL INPUT/OUTPUT

OPERATIONAL AMPLIFIERS WITH SHUTDOWN

 

SLOS220F – JULY 1998 – REVISED OCTOBER 1999

8

POST OFFICE BOX 655303 

 DALLAS, TEXAS 75265

electrical characteristics at specified free-air temperature, V

DD

 = 5 V (unless otherwise noted)

(continued)

PARAMETER

TEST CONDITIONS

TA†

TLV246x

UNIT

PARAMETER

TEST CONDITIONS

TA†

MIN

TYP

MAX

UNIT

IDD

Supply current (per channel)

VO = 2.5 V, 

No load,

25

°

C

0.55

0.65

mA

IDD

Supply current (per channel)

O

,

SHDN > 1.38 V

,

Full range

1

mA

V(ON)

Turnon voltage level

AV = 1

Channel 1

25

°

C

1.372

V

V(ON)

Turnon voltage level

AV = 1

Channel 2

25

°

C

1.368

V

V(OFF)

Turnoff voltage level

AV = 1

Channel 1

25

°

C

1.315

V

V(OFF)

Turnoff voltage level

AV = 1

Channel 2

25

°

C

1.309

V

IDD(SHDN)

Supply current in shutdown

SHDN < 1.3 V,

25

°

C

1

µ

A

IDD(SHDN)

y

(TLV2460, TLV2463, TLV2465)

Per channels in shutdown

Full range

3

µ

A

† Full range is 0

°

C to 70

°

C for the C suffix and –40

°

C to 125

°

C for the I suffix. If not specified, full range is – 40

°

C to 125

°

C.

operating characteristics at specified free-air temperature, V

DD

 = 5 V (unless otherwise noted)

PARAMETER

TEST CONDITIONS

TA†

TLV246x

UNIT

PARAMETER

TEST CONDITIONS

TA†

MIN

TYP

MAX

UNIT

VO(PP) = 2 V

CL = 160 pF

25

°

C

1

1.6

SR

Slew rate at unity gain

VO(PP) = 2 V,

RL = 10 k

CL = 160 pF,

Full

range

0.8

V/

µ

s

V

Equivalent input noise voltage

f = 100 Hz

25

°

C

14

nV/

Hz

Vn

Equivalent input noise voltage

f = 1 kHz

25

°

C

11

nV/

Hz

In

Equivalent input noise current

f = 100 Hz

25

°

C

0.13

pA /

Hz

VO(PP) = 4 V,

AV = 1

0.004%

THD + N

Total harmonic distortion plus noise

VO(PP) = 4 V,

RL = 10 k

,

AV = 10

25

°

C

0.01%

f = 10 kHz

AV = 100

0.04%

Both channels

7.6

t(on)

Amplifier turnon time

AV = 1,

RL = 10 k

Channel 1 only,

Channel 2 on

25

°

C

7.65

µ

s

(

)

RL = 10 k

Channel 2 only,

Channel 1 on

7.25

Both channels

333

t(off)

Amplifier turnoff time

AV = 1,

RL = 10 k

Channel 1 only,

Channel 2 on

25

°

C

328

ns

(

)

RL = 10 k

Channel 2 only,

Channel 1 on

329

Gain-bandwidth product

f = 10 kHz, 

CL = 160 pF

RL = 10 k

,

25

°

C

6.4

MHz

V(STEP)PP = 2 V,

AV = –1,

0.1%

1.53

t

Settling time

V

,

CL = 10 pF,

RL = 10 k

0.01%

25

°

C

1.83

µ

s

ts

Settling time

V(STEP)PP = 2 V,

AV = –1,

0.1%

25

°

C

3.13

µ

s

V

,

CL = 56 pF,

RL = 10 k

0.01%

3.33

φ

m

Phase margin at unity gain

RL = 10 k

CL = 160 pF

25

°

C

45

°

Gain margin

RL = 10 k

,

CL = 160 pF

25

°

C

7

dB

† Full range is 0

°

C to 70

°

C for the C suffix and –40

°

C to 125

°

C for the I suffix. If not specified, full range is – 40

°

C to 125

°

C.

background image

TLV2460, TLV2461, TLV2462, TLV2463, TLV2464, TLV2465, TLV246xA

FAMILY OF LOW-POWER RAIL-TO-RAIL INPUT/OUTPUT

OPERATIONAL AMPLIFIERS WITH SHUTDOWN

 

SLOS220F – JULY 1998 – REVISED OCTOBER 1999

9

POST OFFICE BOX 655303 

 DALLAS, TEXAS 75265

TYPICAL CHARACTERISTICS

Table of Graphs

FIGURE

VIO

Input offset voltage

vs Common-mode input voltage

1, 2

IIB

Input bias current

vs Free-air temperature

3, 4

IIO

Input offset current

vs Free-air temperature

3, 4

VOH

High-level output voltage

vs High-level output current

5, 6

VOL

Low-level output voltage

vs Low-level output current

7, 8

VO(PP)

Peak-to-peak output voltage

vs Frequency

9, 10

Open-loop gain

vs Frequency

11, 12

Phase

vs Frequency

11, 12

AVD

Differential voltage amplification

vs Load resistance

13

Amplifier stability

vs Load

14

Zo

Output impedance

vs Frequency

15, 16

CMRR

Common-mode rejection ratio

vs Frequency

17

kSVR

Supply-voltage rejection ratio

vs Frequency

18, 19

IDD

Supply current

vs Supply voltage

20

IDD

Supply current

vs Free-air temperature

21

Amplifier turnon characteristics

22

Amplifier turnoff characteristics

23

Supply current turnon

24

Supply current turnoff

25

Shutdown supply current

vs Free-air temperature

26

SR

Slew rate

vs Supply voltage

27

V

Equivalent input noise voltage

vs Frequency

28, 29

Vn

Equivalent input noise voltage

vs Common-mode input voltage

30, 31

THD

Total harmonic distortion

vs Frequency

32, 33

THD+N

Total harmonic distortion plus noise

vs Peak-to-peak signal amplitude

34, 35

vs Frequency

11, 12

φ

m

Phase margin

vs Load capacitance

36

vs Free-air temperature

37

Gain bandwidth product

vs Supply voltage

38

Gain bandwidth product

vs Free-air temperature

39

Large signal follower

40, 41

Small signal follower

42, 43

Inverting large signal

44, 45

Inverting small signal

46, 47

background image

TLV2460, TLV2461, TLV2462, TLV2463, TLV2464, TLV2465, TLV246xA

FAMILY OF LOW-POWER RAIL-TO-RAIL INPUT/OUTPUT

OPERATIONAL AMPLIFIERS WITH SHUTDOWN

 

SLOS220F – JULY 1998 – REVISED OCTOBER 1999

10

POST OFFICE BOX 655303 

 DALLAS, TEXAS 75265

TYPICAL CHARACTERISTICS

Figure 1

–0.2

–0.6

–1

0

–0.4

–0.8

1

VICR – Common-Mode Input Voltage – V

INPUT OFFSET VOLTAGE

vs

COMMON-MODE INPUT VOLTAGE

1

0.5

1.5

3

0

2

2.5

VDD = 3 V

TA = 25

°

C

– Input Offset V

oltage – mV

V

IO

0.8

0.4

0.6

0.2

Figure 2

–0.2

–0.6

–1

0

–0.4

–0.8

1

VICR – Common-Mode Input Voltage – V

INPUT OFFSET VOLTAGE

vs

COMMON-MODE INPUT VOLTAGE

2

1

3

5

0

4

VDD = 5 V

TA = 25

°

C

– Input Offset V

oltage – mV

V

IO

0.8

0.4

0.6

0.2

Figure 3

TA – Free-Air Temperature – 

°

C

INPUT BIAS AND INPUT OFFSET CURRENT

vs

FREE-AIR TEMPERATURE

2.5

1.5

0.5

–0.5

–35

5

3

2

1

0

–15

25

125

4.5

–55

45

65

3.5

4

85

105

VDD = 3 V

VI = 1.5 V

I

IB

and

I

IO

– Input Bias and Input Offset Currents – nA

5

IIB

IIO

Figure 4

TA – Free-Air Temperature – 

°

C

INPUT BIAS AND INPUT OFFSET CURRENT

vs

FREE-AIR TEMPERATURE

–1

–35

5

3

2

1

0

–15

25

125

–55

45

65

4

85

105

I

IB

and

I

IO

– Input Bias and Input Offset Currents – nA

5

IIB

IIO

VDD = 5 V

VI = 2.5 V

6

background image

TLV2460, TLV2461, TLV2462, TLV2463, TLV2464, TLV2465, TLV246xA

FAMILY OF LOW-POWER RAIL-TO-RAIL INPUT/OUTPUT

OPERATIONAL AMPLIFIERS WITH SHUTDOWN

 

SLOS220F – JULY 1998 – REVISED OCTOBER 1999

11

POST OFFICE BOX 655303 

 DALLAS, TEXAS 75265

TYPICAL CHARACTERISTICS

Figure 5

TA = 125

°

C

TA = 85

°

C

HIGH-LEVEL OUTPUT VOLTAGE

vs

HIGH-LEVEL OUTPUT CURRENT

0

10

20

30

60

IOH – High-Level Output Current – mA

50

40

70

80

2.5

1

0

2

1.5

0.5

3

V

OH

– High-Level Output V

oltage – V

VDD = 3 VDC

TA = –55

°

C

TA = 25

°

C

TA = –40

°

C

Figure 6

TA = 125

°

C

TA = 85

°

C

HIGH-LEVEL OUTPUT VOLTAGE

vs

HIGH-LEVEL OUTPUT CURRENT

0

20

40

60

120

IOH – High-Level Output Current – mA

100

80

140

200

2.5

1

0

2

1.5

0.5

3

V

OH

– High-Level Output V

oltage – V

VDD = 5 VDC

TA = –55

°

C

4

5

4.5

3.5

160 180

TA = 25

°

C

TA = –40

°

C

Figure 7

LOW-LEVEL OUTPUT VOLTAGE

vs

LOW-LEVEL OUTPUT CURRENT

0

10

20

30

60

IOL – Low-Level Output Current – mA

50

40

70

2.5

1

0

2

1.5

0.5

3

VDD = 3 VDC

TA = –55

°

C

OL

V

 Low-Level Output V

oltage – V

TA = 85

°

C

TA = 125

°

C

TA = 25

°

C

TA = –40

°

C

Figure 8

LOW-LEVEL OUTPUT VOLTAGE

vs

LOW-LEVEL OUTPUT CURRENT

0

20

40

60

120

IOL – Low-Level Output Current – mA

100

80

140

2.5

1

0

2

1.5

0.5

3

VDD = 5 VDC

4.5

4

3.5

160

OL

V

 Low-Level Output V

oltage – V

TA = –55

°

C

TA = 85

°

C

TA = 125

°

C

TA = 25

°

C

TA = –40

°

C

background image

TLV2460, TLV2461, TLV2462, TLV2463, TLV2464, TLV2465, TLV246xA

FAMILY OF LOW-POWER RAIL-TO-RAIL INPUT/OUTPUT

OPERATIONAL AMPLIFIERS WITH SHUTDOWN

 

SLOS220F – JULY 1998 – REVISED OCTOBER 1999

12

POST OFFICE BOX 655303 

 DALLAS, TEXAS 75265

TYPICAL CHARACTERISTICS

Figure 9

PEAK-TO-PEAK OUTPUT VOLTAGE

vs

FREQUENCY

10k

100k

10M

f – Frequency – Hz

1M

3

2

1

0

2.5

1.5

0.5

V

O(PP)

– Peak-to-Peak Output V

oltage – V

VDD = 3 V

AV = –10

THD = 1%

RL = 10 k

Figure 10

PEAK-TO-PEAK OUTPUT VOLTAGE

vs

FREQUENCY

10k

100k

10M

f – Frequency – Hz

1M

3

2

1

0

2.5

1.5

0.5

V

O(PP)

– Peak-to-Peak Output V

oltage – V

VDD = 5 V

AV = –10

THD = 1%

RL = 10 k

3.5

5

4

5.5

4.5

OPEN-LOOP GAIN AND PHASE

vs

FREQUENCY

40

20

0

–20

100

10k

f – Frequency – Hz

50

30

10

–10

1k

100k

1M

60

80

10

70

90

–140

°

–200

°

–120

°

–100

°

–80

°

100

–60

°

–40

°

–20

°

0

°

20

°

40

°

–180

°

–160

°

Open-Lopp Gain – dB

Phase

10M

AVD

Phase

VDD = 

±

1.5 V

RL = 10 k

CL = 0 

TA = 25

°

C

Figure 11

background image

TLV2460, TLV2461, TLV2462, TLV2463, TLV2464, TLV2465, TLV246xA

FAMILY OF LOW-POWER RAIL-TO-RAIL INPUT/OUTPUT

OPERATIONAL AMPLIFIERS WITH SHUTDOWN

 

SLOS220F – JULY 1998 – REVISED OCTOBER 1999

13

POST OFFICE BOX 655303 

 DALLAS, TEXAS 75265

TYPICAL CHARACTERISTICS

OPEN-LOOP GAIN AND PHASE

vs

FREQUENCY

40

20

0

–20

100

10k

f – Frequency – Hz

50

30

10

–10

1k

100k

1M

60

80

10

70

90

–140

°

–200

°

–120

°

–100

°

–80

°

100

–60

°

–40

°

–20

°

0

°

20

°

40

°

–180

°

–160

°

Open-Loop Gain – dB

Phase

10M

AVD

Phase

VDD = 

±

2.5 V

RL = 10 k

CL = 0

TA = 25

°

C

Figure 12

Figure 13

RL – Load Resistance – 

DIFFERENTIAL VOLTAGE AMPLIFICATION

vs

LOAD RESISTANCE

120

80

40

0

140

100

60

20

1k

10k

1M

180

100

100k

160

TA = 25

°

C

– Differential V

oltage 

Amplification 

– 

V/mV

A

VD

VDD = 

±

2.5 V

VDD = 

±

1.5 V

Figure 14

C

L

– Capacitive Load – pF

AMPLIFIER STABILITY

vs

LOAD

10

100

10k

RL – Resistive Load – 

1k

10000

100

1000

Phase Margin > 30

°

VDD = 5 V

Phase Margin = 30

°

TA = 25

°

C

Phase Margin < 30

°

background image

TLV2460, TLV2461, TLV2462, TLV2463, TLV2464, TLV2465, TLV246xA

FAMILY OF LOW-POWER RAIL-TO-RAIL INPUT/OUTPUT

OPERATIONAL AMPLIFIERS WITH SHUTDOWN

 

SLOS220F – JULY 1998 – REVISED OCTOBER 1999

14

POST OFFICE BOX 655303 

 DALLAS, TEXAS 75265

TYPICAL CHARACTERISTICS

Figure 15

OUTPUT IMPEDANCE

vs

FREQUENCY

f – Frequency – Hz

1

0.1

0.01

10

1000

AV = 100

100

1k

10k

10M

1M

100k

– Output Impedance –

Z

o

100

VDD = 

±

1.5 V

TA = 25

°

C

AV = 10

AV = 1

Figure 16

OUTPUT IMPEDANCE

vs

FREQUENCY

f – Frequency – Hz

1

0.1

0.01

10

1000

AV = 100

100

1k

10k

10M

1M

100k

– Output Impedance –

Z

o

100

VDD = 

±

2.5 V

TA = 25

°

C

AV = 10

AV = 1

CMRR – Common-Mode Rejection Ratio – dB

COMMON-MODE REJECTION RATIO

vs

FREQUENCY

f – Frequency – Hz

10

1k

10k

10M

1M

100k

90

80

70

60

85

75

65

VDD = 5 V

VIC = 2.5 V

100

VDD = 3 V

VIC = 1.5 V

Figure 17

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TYPICAL CHARACTERISTICS

Figure 18

SUPPLY-VOLTAGE REJECTION RATIO

vs

FREQUENCY

f – Frequency – Hz

10

1k

10k

10M

1M

100k

110

80

60

40

90

70

50

100

100

VDD = 

±

1.5 V

TA = 25

°

C

k

SVR

– Supply V

oltage Rejection Ratio – dB

–kSVR

+kSVR

+kSVR

–kSVR

Figure 19

SUPPLY-VOLTAGE REJECTION RATIO

vs

FREQUENCY

f – Frequency – Hz

10

1k

10k

10M

1M

100k

80

60

40

90

70

50

100

VDD = 

±

2.5 V

TA = 25

°

C

k

SVR

– Supply V

oltage Rejection Ratio – dB

–kSVR

+kSVR

+kSVR

–kSVR

Figure 20

VDD – Supply Voltage – V

SUPPLY CURRENT

vs

SUPPLY VOLTAGE

0.7

0.5

0.30

0.10

3

4

0.8

0.6

0.40

0.20

3.5

4.5

6

2.5

5

5.5

IDD = 25

°

C

I DD

– Supply Current – mA

IDD = 85

°

C

IDD = –55

°

C

IDD = 125

°

C

IDD = –40

°

C

Figure 21

TA – Free-Air Temperature – 

°

C

SUPPLY CURRENT

vs

FREE-AIR TEMPERATURE

0.60

0.50

0.40

0.30

–35

5

0.65

0.55

0.45

0.35

–15

25

125

0.80

–55

45

65

0.70

0.75

VDD = 5 V

VI = 2.5 V

85

105

I DD

– Supply Current – mA

VDD = 3 V

VI = 1.5 V

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TYPICAL CHARACTERISTICS

Figure 22

t – Time – 

µ

s

AMPLIFIER WITH A SHUTDOWN PULSE

TURNON CHARACTERISTICS

2

0

2

0

–3

1

1

3

1

–1

3

9

5

–5

V

5

7

SD

– Shutdown V

oltage – V

3

11

4

VDD = 5 V

RL = 10 k

AV = 1

TA = 25

°

C

Shutdown Pin

Amplifier Output

Figure 23

t – Time – 

µ

s

AMPLIFIER WITH A SHUTDOWN PULSE

TURNOFF CHARACTERISTICS

2

0

2

0

–3

1

1

3

1

–1

3

5

–5

V

5

7

SD

– Shutdown V

oltage – V

3

4

VDD = 5 V

RL = 10 k

AV = 1

TA = 25

°

C

Shutdown Pin

Amplifier Output

VDD = 5 V

VI = 2.5 V

AV = 1

TA = 25

°

C

0.4

–0.2

0.2

0

–0.4

–0.2

0

0.6

t – Time – 

µ

s

0.4

0.2

SUPPLY CURRENT WITH A SHUTDOWN PULSE

TURNON CHARACTERISTICS

0.8

1

0.6

Supply Current

Shutdown Pin

I

DD

– Supply Current – mA

4.5

5.5

2.5

3.5

0.5

1.5

–0.5

V

SD

– Shutdown V

oltage – V

Figure 24

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TYPICAL CHARACTERISTICS

VDD = 5 V

VI = 2.5 V

AV = 1

TA = 25

°

C

0.4

–0.2

0.2

0

–0.4

–0.2

0

0.6

t – Time – 

µ

s

0.4

0.2

TURNOFF SUPPLY CURRENT

WITH A SHUTDOWN PULSE

0.8

1

0.6

Supply Current

Shutdown Pin

I

DD

– Supply Current – mA

4.5

5.5

2.5

3.5

0.5

1.5

–0.5

V

SD

– Shutdown V

oltage – V

Figure 25

Figure 26

TA – Free-Air Temperature – 

°

C

SHUTDOWN SUPPLY CURRENT

vs

FREE-AIR TEMPERATURE

2.5

1.5

0.5

–0.5

–35

5

3

2

1

0

–15

25

125

–55

45

65

85

105

VDD = 5 V

VI = 2.5 V

–1

DDI

Supply Current – 

–A

µ

VDD = 3 V

VI = 1.5 V

Figure 27

VDD – Supply Voltage – V

SLEW RATE

vs

SUPPLY VOLTAGE

2.5

3

3.5

4

5.5

6

5

4.5

1.6

1.5

1.4

1.3

1.55

1.45

1.35

1.8

1.7

1.75

1.65

SR – Slew Rate – V/

µ

s

VO(PP) = 2 V

CL = 160 pF

AV = 1

RL = 10 k

TA = 25

°

C

SR+

SR–

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TYPICAL CHARACTERISTICS

Figure 28

EQUIVALENT INPUT NOISE VOLTAGE

vs

FREQUENCY

100

1k

100k

f – Frequency – Hz

10k

10

14

12

15

13

11

17

18

16

nV/

Hz

– Equivalent Input Noise V

oltage –

V

n

VDD = 3 V

AV = 10

VI = 1.5 V

TA = 25

°

C

Figure 29

EQUIVALENT INPUT NOISE VOLTAGE

vs

FREQUENCY

100

1k

100k

f – Frequency – Hz

10k

10

14

12

15

13

11

17

18

16

nV/

Hz

– Equivalent Input Noise V

oltage –

V

n

VDD = 5 V

AV = 10

VI = 2.5 V

TA = 25

°

C

Figure 30

VICR – Common-Mode Input Voltage – V

EQUIVALENT INPUT NOISE VOLTAGE

vs

COMMON-MODE INPUT VOLTAGE

12

10

1

14

13

11

0.5

1.5

3

20

0

2

2.5

15

VDD = 3 V

AV = 10

f = 1 kHz

TA = 25

°

C

nV/

Hz

– Equivalent Input Noise V

oltage –

V

n

Figure 31

VICR – Common-Mode Input Voltage – V

EQUIVALENT INPUT NOISE VOLTAGE

vs

COMMON-MODE INPUT VOLTAGE

12

10

2

14

13

11

1

3

20

0

4

5

15

VDD = 5 V

AV = 10

f = 1 kHz

TA = 25

°

C

nV/

Hz

– Equivalent Input Noise V

oltage –

V

n

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TYPICAL CHARACTERISTICS

Figure 32

TOTAL HARMONIC DISTORTION

vs

FREQUENCY

0.010

0.001

100

10k

f – Frequency – Hz

1k

100k

10

0.1

THD 

– 

T

otal Harmonic Distortion – %

VDD = 

±

1.5 V

VO(PP) = 2 V

RL = 10 k

AV = 1

AV = 10

AV = 100

0.5

Figure 33

TOTAL HARMONIC DISTORTION

vs

FREQUENCY

0.010

0.001

100

10k

f – Frequency – Hz

1k

100k

10

0.1

THD 

– 

T

otal Harmonic Distortion – %

VDD = 

±

2.5 V

VO(PP) = 4 V

RL = 10 k

AV = 1

AV = 10

AV = 100

1

Figure 34

TOTAL HARMONIC DISTORTION PLUS NOISE

vs

PEAK-TO-PEAK SIGNAL AMPLITUDE

0.010

0.001

0.1

THD+N 

– 

T

otal Harmonic Distortion +Noise – %

VDD = 3 V

AV = 1

TA = 25

°

C

1

RL = 10 k

RL = 2 k

RL = 250 

RL = 100 k

Peak-to-Peak Signal Amplitude – V

1

1.2 1.4

1.6

2.2 2.4

2

1.8

2.6 2.8

3

3.2

Figure 35

TOTAL HARMONIC DISTORTION PLUS NOISE

vs

PEAK-TO-PEAK SIGNAL AMPLITUDE

0.010

0.001

0.1

THD+N 

– 

T

otal Harmonic Distortion +Noise – %

VDD = 5 V

AV = 1

TA = 25

°

C

1

RL = 10 k

RL = 250 

RL = 100 k

Peak-to-Peak Signal Amplitude – V

4

4.1

4.2

4.3

4.6

4.7

4.5

4.4

4.8

4.9

5

RL = 2 k

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TYPICAL CHARACTERISTICS

Figure 36

CL – Load Capacitance – pF

PHASE MARGIN

vs

LOAD CAPACITANCE

60

40

20

0

70

50

30

10

100

1k

100k

90

10

10k

80

m

φ

– Phase Margin – degrees

VDD = 

±

2.5 V

TA = 25

°

C

RL = 10 k

Rnull = 50 

Rnull = 20 

Rnull = 0 

Figure 37

TA – Free-Air Temperature – 

°

C

PHASE MARGIN

vs

FREE-AIR TEMPERATURE

60

50

40

30

–35

5

55

45

35

–15

25

125

–55

45

65

RL = 10 k

CL = 160 pF

85

105

VDD = 

±

2.5 V

VDD = 

±

1.5 V

m

φ

– Phase Margin – degrees

Figure 38

VDD – Supply Voltage – V

GAIN BANDWIDTH PRODUCT

vs

SUPPLY VOLTAGE

2.5

3

3.5

4

5.5

6

5

4.5

5

4.5

4

3.5

4.75

4.25

3.75

Gain Bandwidth Product – MHz

CL = 160 pF

RL = 10 k

f = 10 kHz

TA = 25

°

C

Figure 39

TA – Free-Air Temperature – 

°

C

GAIN BANDWIDTH PRODUCT

vs

FREE-AIR TEMPERATURE

4.5

4

3.5

3

–35

5

4.25

3.75

3.25

–15

25

125

–55

45

65

RL = 10 k

CL = 160 pF

85

105

VDD = 

±

2.5 V

VDD = 

±

1.5 V

5

4.75

Gain Bandwidth Product – MHz

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TYPICAL CHARACTERISTICS

Figure 40

V

O

– V

oltage – V

1.4

0.8

1.2

1

–2

0

2

4

10

t – Time – 

µ

s

8

6

12

14

LARGE SIGNAL FOLLOWER

2.2

1.8

2

1.6

Input

Output

16

18

Output

Input

VDD = 3 V

VI(PP) = 1 V

VI = 1.5 V

RL = 10 k

CL = 160 pF

AV = 1

TA = 25

°

C

Figure 41

V

O

– V

oltage – V

2.1

1.7

1.3

–2

0

2

4

10

t – Time – 

µ

s

8

6

12

14

LARGE SIGNAL FOLLOWER

3.7

2.9

3.3

2.5

Input

Output

16

18

Output

Input

VDD = 5 V

VI(PP) = 2 V

VI = 2.5 V

RL = 10 k

CL = 160 pF

AV = 1

TA = 25

°

C

Figure 42

V

O

– V

oltage – V

1.5

1.4

1.45

–0.2

0

0.2

0.4

1

t – Time – 

µ

s

0.8

0.6

1.2 1.4

SMALL SIGNAL FOLLOWER

1.6

1.55

Input

Output

1.6 1.8

VDD = 3 V

VI(PP) = 100 mV

VI = 1.5 V

RL = 10 k

CL = 160 pF

AV = 1

TA = 25

°

C

Figure 43

V

O

– V

oltage – V

2.5

2.4

2.45

–0.2

0

0.2

0.4

1

t – Time – 

µ

s

0.8

0.6

1.2 1.4

SMALL SIGNAL FOLLOWER

2.6

2.55

Input

Output

1.6 1.8

VDD = 5 V

VI(PP) = 100 mV

VI = 2.5 V

RL = 10 k

CL = 160 pF

AV = 1

TA = 25

°

C

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TYPICAL CHARACTERISTICS

Figure 44

V

O

– V

oltage – V

VDD = 3 V

VI(PP) = 1 V

VI = 1.5 V

RL = 10 k

CL = 160 pF

AV = –1

TA = 25

°

C

1.1

0.5

0.9

0.7

–0.2

0

0.2

0.4

1

t – Time – 

µ

s

0.8

0.6

1.2 1.4

INVERTING LARGE SIGNAL

1.9

1.5

1.7

1.3

1.6 1.8

2.3

2.1

Input

Output

Figure 45

VDD = 5 V

VI(PP) = 2 V

VI = 2.5 V

RL = 10 k

CL = 160 pF

AV = –1

TA = 25

°

C

2.5

1

2

1.5

–0.2

0

0.2

0.4

1

t – Time – 

µ

s

0.8

0.6

1.2 1.4

INVERTING LARGE SIGNAL

3.5

4

3

1.6 1.8

Input

Output

V

O

– V

oltage – V

Figure 46

V

O

– V

oltage – V

1.5

1.4

1.45

–0.2

0

0.2

0.4

1

t – Time – 

µ

s

0.8

0.6

1.2 1.4

INVERTING SMALL SIGNAL

1.6

1.55

Input

Output

1.6 1.8

VDD = 3 V

VI(PP) = 100 mV

VI = 1.5 V

RL = 10 k

CL = 160 pF

AV = –1

TA = 25

°

C

Figure 47

V

O

– V

oltage – V

2.5

2.4

2.45

–0.2

0

0.2

0.4

1

t – Time – 

µ

s

0.8

0.6

1.2 1.4

INVERTING SMALL SIGNAL

2.6

2.55

Input

Output

1.6 1.8

VDD = 5 V

VI(PP) = 100 mV

VI = 2.5 V

RL = 10 k

CL = 160 pF

AV = –1

TA = 25

°

C

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PARAMETER MEASUREMENT INFORMATION

_

+

Rnull

RL

CL

Figure 48

APPLICATION INFORMATION

driving a capacitive load

When the amplifier is configured in this manner, capacitive loading directly on the output will decrease the

device’s phase margin leading to high frequency ringing or oscillations. Therefore, for capacitive loads of greater

than 10 pF, it is recommended that a resistor be placed in series (R

NULL

) with the output of the amplifier, as

shown in Figure 49. A minimum value of 20 

 should work well for most applications.

CLOAD

RF

Input

Output

RG

RNULL

_

+

Figure 49. Driving a Capacitive Load

offset voltage

The output offset voltage, (V

OO

) is the sum of the input offset voltage (V

IO

) and both input bias currents (I

IB

) times

the corresponding gains. The following schematic and formula can be used to calculate the output offset

voltage:

V

OO

+

V

IO

ǒ

1

)

ǒ

R

F

R

G

Ǔ

Ǔ

"

I

IB

)

R

S

ǒ

1

)

ǒ

R

F

R

G

Ǔ

Ǔ

"

I

IB–

R

F

+

VI

+

RG

RS

RF

IIB–

VO

IIB+

Figure 50. Output Offset Voltage Model

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APPLICATION INFORMATION

general configurations

When receiving low-level signals, limiting the bandwidth of the incoming signals into the system is often

required. The simplest way to accomplish this is to place an RC filter at the noninverting terminal of the amplifer

(see Figure 51).

VI

VO

C1

+

RG

RF

R1

f

–3dB

+

1

2

p

R1C1

V

O

V

I

+

ǒ

1

)

R

F

R

G

Ǔ

ǒ

1

1

)

sR1C1

Ǔ

Figure 51. Single-Pole Low-Pass Filter

If even more attenuation is needed, a multiple pole filter is required. The Sallen-Key filter can be used for this

task. For best results, the amplifier should have a bandwidth that is 8 to 10 times the filter frequency bandwidth.

Failure to do this can result in phase shift of the amplifier.

VI

C2

R2

R1

C1

RF

RG

R1 = R2 = R

C1 = C2 = C

Q = Peaking Factor

(Butterworth Q = 0.707)

(

=

1

Q

2 –

)

RG

RF

_

+

f

–3dB

+

1

2

p

RC

Figure 52. 2-Pole Low-Pass Sallen-Key Filter

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APPLICATION INFORMATION

shutdown function

Three members of the TLV246x family (TLV2460/3/5) have a shutdown terminal for conserving battery life in

portable applications. When the shutdown terminal is tied low, the supply current is reduced to 0.3 

µ

A/channel,

the amplifier is disabled, and the outputs are placed in a high impedance mode. To enable the amplifier, the

shutdown terminal can either be left floating or pulled high. When the shutdown terminal is left floating, care

should be taken to ensure that parasitic leakage current at the shutdown terminal does not inadvertently place

the operational amplifier into shutdown. The shutdown terminal threshold is always referenced to V

DD

/2.

Therefore, when operating the device with split supply voltages (e.g. 

±

2.5 V), the shutdown terminal needs to

be pulled to V

DD

– (not GND) to disable the operational amplifier.

The amplifier’s output with a shutdown pulse is shown in Figures 22, 23, 24, and 25. The amplifier is powered

with a single 5-V supply and configured as a noninverting configuration with a gain of 5. The amplifier turnon

and turnoff times are measured from the 50% point of the shutdown pulse to the 50% point of the output

waveform. The times for the single, dual, and quad are listed in the data tables.

circuit layout considerations

To achieve the levels of high performance of the TLV246x, follow proper printed-circuit board design techniques.

A general set of guidelines is given in the following.

D

Ground planes – It is highly recommended that a ground plane be used on the board to provide all

components with a low inductive ground connection. However, in the areas of the amplifier inputs and

output, the ground plane can be removed to minimize the stray capacitance.

D

Proper power supply decoupling – Use a 6.8-

µ

F tantalum capacitor in parallel with  a 0.1-

µ

F ceramic

capacitor on each supply terminal.  It may be possible to share the tantalum among several amplifiers

depending on the application, but a 0.1-

µ

F ceramic capacitor should always be used on the supply terminal

of every amplifier.  In addition, the 0.1-

µ

F capacitor should be placed as close as possible to the supply

terminal. As this distance increases, the inductance in the connecting trace makes the capacitor less

effective. The designer should strive for distances of less than 0.1 inches between the device power

terminals and the ceramic capacitors.

D

Sockets – Sockets can be used but are not recommended. The additional lead inductance in the socket pins

will often lead to stability problems. Surface-mount packages soldered directly to the printed-circuit board

is the best implementation.

D

Short trace runs/compact part placements – Optimum high performance is achieved when stray series

inductance has been minimized. To realize this, the circuit layout should be made as compact as possible,

thereby minimizing the length of all trace runs. Particular attention should be paid to the inverting input of

the amplifier. Its length should be kept as short as possible. This will help to minimize stray capacitance at

the input of the amplifier.

D

Surface-mount passive components – Using surface-mount passive components is recommended for high

performance amplifier circuits for several reasons.  First, because of the extremely low lead inductance of

surface-mount components, the problem with stray series inductance is greatly reduced.   Second, the small

size of surface-mount components naturally leads to a more compact layout thereby minimizing both stray

inductance and capacitance.  If leaded components are used, it is recommended that the  lead lengths be

kept as short as possible.

background image

TLV2460, TLV2461, TLV2462, TLV2463, TLV2464, TLV2465, TLV246xA

FAMILY OF LOW-POWER RAIL-TO-RAIL INPUT/OUTPUT

OPERATIONAL AMPLIFIERS WITH SHUTDOWN

 

SLOS220F – JULY 1998 – REVISED OCTOBER 1999

26

POST OFFICE BOX 655303 

 DALLAS, TEXAS 75265

APPLICATION INFORMATION

general power dissipation considerations

For a given 

θ

JA

, the maximum power dissipation is shown in Figure 53 and is calculated by the following formula:

P

D

+

ǒ

T

MAX

–T

A

q

JA

Ǔ

Where:

P

D

= Maximum power dissipation of THS246x IC (watts)

T

MAX

= Absolute maximum junction temperature (150

°

C)

T

A

= Free-ambient air temperature (

°

C)

θ

JA

θ

JC 

+

 

θ

CA

θ

JC

= Thermal coefficient from junction to case

θ

CA

= Thermal coefficient from case to ambient air (

°

C/W)

1

0.75

0.5

0

–55 –40 –25 –10 5

Maximum Power Dissipation – W

1.25

1.5

MAXIMUM POWER DISSIPATION

vs

FREE-AIR TEMPERATURE

1.75

20 35 50

0.25

TA – Free-Air Temperature – 

°

C

2

65 80 95 110 125

MSOP Package

Low-K Test PCB

θ

JA = 260

°

C/W

TJ  = 150

°

C

PDIP Package

Low-K Test PCB

θ

JA = 104

°

C/W

SOIC Package

Low-K Test PCB

θ

JA = 176

°

C/W

SOT-23 Package

Low-K Test PCB

θ

JA = 324

°

C/W

NOTE A: Results are with no air flow and using JEDEC Standard Low-K test PCB.

Figure 53. Maximum Power Dissipation vs Free-Air Temperature

background image

TLV2460, TLV2461, TLV2462, TLV2463, TLV2464, TLV2465, TLV246xA

FAMILY OF LOW-POWER RAIL-TO-RAIL INPUT/OUTPUT

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27

POST OFFICE BOX 655303 

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APPLICATION INFORMATION

macromodel information

Macromodel information provided was derived using Microsim

Parts

 Release 8, the model generation

software used with Microsim

 PSpice

. The Boyle macromodel (see Note 2) and subcircuit in Figure 54 are

generated using the TLV246x typical electrical and operating characteristics at T

A

 = 25

°

C. Using this

information, output simulations of the following key parameters can be generated to a tolerance of 20% (in most

cases):

D

Maximum positive output voltage swing

D

Maximum negative output voltage swing

D

Slew rate

D

Quiescent power dissipation

D

Input bias current

D

Open-loop voltage amplification

D

Unity-gain frequency

D

Common-mode rejection ratio

D

Phase margin

D

DC output resistance

D

AC output resistance

D

Short-circuit output current limit

NOTE 2: G. R. Boyle, B. M. Cohn, D. O. Pederson, and J. E. Solomon, “Macromodeling of Intergrated Circuit Operational Amplifiers”, 

IEEE

Journal of Solid-State Circuits, SC-9, 353 (1974).

+

+

+

+

+

.SUBCKT TLV246X   1 2 3 4 5

C1

11

12

2.46034E–12

C2

6

7

10.0000E–12

CSS

10

99

443.21E–15

DC

5

53

DY

DE

54

5

DY

DLP

90

91

DX

DLN

92

90

DX

DP

4

3

DX

EGND

99

0

POLY (2) (3,0) (4,0) 0 .5 .5

FB

7

99

POLY (5) VB VC VE VLP

+ VLN 0 21.600E6 –1E3 1E3 22E6 –22E6

GA

6

0

11

12 345.26E–6

GCM 0

6

10

99 

15.4226E–9

ISS

10

4

DC 18.850E–6

HLIM

90

0

VLIM 1K

J1

11

2

10 JX1

J2

12

1

10 JX2

R2

6

9

100.00E3

RD1

3

11

2.8964E3

RD2

3

12

2.8964E3

R01

8

5

5.6000

R02

7

99

6.2000

RP

3

4

8.9127

RSS

10

99

10.610E6

VB

9

0

DC 0

VC 3 

53

DC 

.7836

VE

54

4

DC .7436

VLIM

7

8

DC 0

VLP

91

0

DC 117

VLN

0

92

DC 117

.MODEL DX D (IS=800.00E–18)

.MODEL DY D (IS=800.00E–18 Rs = 1m Cjo=10p)

.MODEL JX1 NJF (IS=1.0000E–12 BETA=6.3239E–3

+ VTO= –1)

.MODEL JX2 NJF (IS=1.0000E–12 BETA=6.3239E–3

+ VTO= –1)

.ENDS

VDD +

RP

IN –

2

IN +

1

GND

RD1

11

J1

J2

10

RSS

ISS

3

12

RD2

DP

VD

DC

4

C1

53

EGND

FB

HLIM

90

DLP

91

DLN

92

VLN

VLP

99

CSS

+

VE

DE

54

OUT

+

+

R2

6

9

VB

C2

GA

VLIM

8

5

RO1

RO2

7

GCM

Figure 54. Boyle Macromodels and Subcircuit

PSpice and Parts are trademarks of MicroSim Corporation.

background image

TLV2460, TLV2461, TLV2462, TLV2463, TLV2464, TLV2465, TLV246xA

FAMILY OF LOW-POWER RAIL-TO-RAIL INPUT/OUTPUT

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28

POST OFFICE BOX 655303 

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macromodel information (continued)

.subckt TLV_246Y 1 2 3 4 5 6

c1

11

12

2.4603E–12

c2

72

7

10.000E–12

css

10

99

443.21E–15

dc

70

53

dy

de

54

70

dy

dlp

90

91

dx

dln

92

90

dx

dp

4

3

dx

egnd

99

0

poly(2) (3,0) (4,0) 0 .5 .5

fb

7

99

poly(5) vb vc ve vlp vln 0

21.600E6 –1E3 1E3 22E6 –22E6

ga

72

0

11 12 345.26E–6

gcm

0

72 10 

99 

15.422E–9

iss

74

4 dc 

18.850E–6

hlim 90

0 vlim 

1K

j1

11

2 10 

jx1

j2

12

1 10 

jx2

r2

72

9 100.00E3

rd1

3 11 

2.8964E3

rd2

3 12 

2.8964E3

ro1

8

70 5.6000

ro2

7 99 

6.2000

rp

3

71 8.9127

rss

10 99 10.610E6

rs1

6

4

1G

rs2

6

4

1G

rs3

6

4

1G

rs4

6

4

1G

s1

71

4

6  4  s1x

s2

70

5

6  4  s1x

s3

10

74

6  4  s1x

s4

74

4

6  4  s2x

vb

9

0 dc 

0

vc

3 53 

dc 

.7836

ve

54

4 dc 

.7436

vlim

7

8 dc 

0

vlp

91

0 dc 

117

vln

0 92 

dc 

117

.model dx D(Is=800.00E–18)

.model dy D(Is=800.00E–18 Rs=1m Cjo=10p)

.model jx1 NJF(Is=1.0000E–12 Beta=6.3239E–3 Vto=–1)

.model jx2 NJF(Is=1.0000E–12 Beta=6.3239E–3 Vto=–1)

.model s1x VSWITCH(Roff=1E8 Ron=1.0 Voff=2.5 Von=0.0)

.model s2x  VSWITCH(Roff=1E8 Ron=1.0 Voff=0 Von=2.5)

.ends

Figure 54. Boyle Macromodels and Subcircuit (Continued)

background image

TLV2460, TLV2461, TLV2462, TLV2463, TLV2464, TLV2465, TLV246xA

FAMILY OF LOW-POWER RAIL-TO-RAIL INPUT/OUTPUT

OPERATIONAL AMPLIFIERS WITH SHUTDOWN

 

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29

POST OFFICE BOX 655303 

 DALLAS, TEXAS 75265

MECHANICAL DATA

D (R-PDSO-G**)    

PLASTIC SMALL-OUTLINE PACKAGE

14 PIN SHOWN

4040047 / D 10/96

0.228 (5,80)

0.244 (6,20)

0.069 (1,75) MAX

0.010 (0,25)

0.004 (0,10)

1

14

0.014 (0,35)

0.020 (0,51)

A

0.157 (4,00)

0.150 (3,81)

7

8

0.044 (1,12)

0.016 (0,40)

Seating Plane

0.010 (0,25)

PINS **

0.008 (0,20) NOM

A  MIN

A  MAX

DIM

Gage Plane

0.189

(4,80)

(5,00)

0.197

8

(8,55)

(8,75)

0.337

14

0.344

(9,80)

16

0.394

(10,00)

0.386

0.004 (0,10)

M

0.010 (0,25)

0.050 (1,27)

0

°

– 8

°

NOTES: B. All linear dimensions are in inches (millimeters).

C. This drawing is subject to change without notice.

D. Body dimensions do not include mold flash or protrusion, not to exceed 0.006 (0,15).

E. Falls within JEDEC MS-012

background image

TLV2460, TLV2461, TLV2462, TLV2463, TLV2464, TLV2465, TLV246xA

FAMILY OF LOW-POWER RAIL-TO-RAIL INPUT/OUTPUT

OPERATIONAL AMPLIFIERS WITH SHUTDOWN

 

SLOS220F – JULY 1998 – REVISED OCTOBER 1999

30

POST OFFICE BOX 655303 

 DALLAS, TEXAS 75265

MECHANICAL DATA

DBV (R-PDSO-G5)   

PLASTIC SMALL-OUTLINE PACKAGE

0,25

0,35

0,55

Gage Plane

0,15 NOM

4073253-4/B 10/97

2,50

3,00

0,40

0,20

1,50

1,80

4

5

3

3,10

1

2,70

1,00

1,30

0,05 MIN

Seating Plane

0,10

0,95

M

0,25

0

°

– 8

°

NOTES: A. All linear dimensions are in millimeters.

B. This drawing is subject to change without notice.

C. Body dimensions include mold flash or protrusion.

background image

TLV2460, TLV2461, TLV2462, TLV2463, TLV2464, TLV2465, TLV246xA

FAMILY OF LOW-POWER RAIL-TO-RAIL INPUT/OUTPUT

OPERATIONAL AMPLIFIERS WITH SHUTDOWN

 

SLOS220F – JULY 1998 – REVISED OCTOBER 1999

31

POST OFFICE BOX 655303 

 DALLAS, TEXAS 75265

MECHANICAL DATA

DBV (R-PDSO-G6)    

PLASTIC SMALL-OUTLINE PACKAGE

0,25

Gage Plane

0,15 NOM

4073253-5/B 10/97

2,50

3,00

0,40

0,20

1,50

1,80

4

6

3

3,10

1

2,70

1,30

1,00

0,05 MIN

Seating Plane

0,95

M

0,25

0

°

– 8

°

0,10

NOTES: A. All linear dimensions are in millimeters.

B. This drawing is subject to change without notice.

C. Body dimensions include mold flash or protrusion.

background image

TLV2460, TLV2461, TLV2462, TLV2463, TLV2464, TLV2465, TLV246xA

FAMILY OF LOW-POWER RAIL-TO-RAIL INPUT/OUTPUT

OPERATIONAL AMPLIFIERS WITH SHUTDOWN

 

SLOS220F – JULY 1998 – REVISED OCTOBER 1999

32

POST OFFICE BOX 655303 

 DALLAS, TEXAS 75265

MECHANICAL DATA

DGK (R-PDSO-G8)   

PLASTIC SMALL-OUTLINE PACKAGE

0,69

0,41

0,25

0,15 NOM

Gage Plane

4073329/A 02/97

4,98

0,25

5

3,05

4,78

2,95

8

4

3,05

2,95

1

0,38

1,07 MAX

0,15 MIN

Seating Plane

0,65

M

0,25

0

°

– 6

°

0,10

NOTES: A. All linear dimensions are in millimeters.

B. This drawing is subject to change without notice.

C. Body dimensions do not include mold flash or protrusion.

D. Falls within JEDEC MO-187

background image

TLV2460, TLV2461, TLV2462, TLV2463, TLV2464, TLV2465, TLV246xA

FAMILY OF LOW-POWER RAIL-TO-RAIL INPUT/OUTPUT

OPERATIONAL AMPLIFIERS WITH SHUTDOWN

 

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33

POST OFFICE BOX 655303 

 DALLAS, TEXAS 75265

MECHANICAL DATA

DGS (S-PDSO-G10)     

PLASTIC SMALL-OUTLINE PACKAGE

0,69

0,41

0,25

0,15 NOM

Gage Plane

4073272/A 12/97

4,98

0,17

6

3,05

4,78

2,95

10

5

3,05

2,95

1

0,27

0,15

0,05

1,07 MAX

Seating Plane

0,10

0,50

M

0,25

0

°

– 6

°

NOTES: A. All linear dimensions are in millimeters.

B. This drawing is subject to change without notice.

C. Body dimensions do not include mold flash or protrusion.

background image

TLV2460, TLV2461, TLV2462, TLV2463, TLV2464, TLV2465, TLV246xA

FAMILY OF LOW-POWER RAIL-TO-RAIL INPUT/OUTPUT

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34

POST OFFICE BOX 655303 

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MECHANICAL DATA

N (R-PDIP-T**)   

PLASTIC DUAL-IN-LINE PACKAGE

20

0.975

(24,77)

0.940

(23,88)

18

0.920

0.850

14

0.775

0.745

(19,69)

(18,92)

16

0.775

(19,69)

(18,92)

0.745

A  MIN

DIM

A  MAX

PINS **

0.310 (7,87)

0.290 (7,37)

(23.37)

(21.59)

Seating Plane

0.010 (0,25) NOM

14/18 PIN ONLY

4040049/C 08/95

9

8

0.070 (1,78) MAX

A

0.035 (0,89) MAX

0.020 (0,51) MIN

16

1

0.015 (0,38)

0.021 (0,53)

0.200 (5,08) MAX

0.125 (3,18) MIN

0.240 (6,10)

0.260 (6,60)

M

0.010 (0,25)

0.100 (2,54)

0

°

– 15

°

16 PIN SHOWN

NOTES: A. All linear dimensions are in inches (millimeters).

B. This drawing is subject to change without notice.

C. Falls within JEDEC MS-001 (20 pin package is shorter then MS-001.)

background image

TLV2460, TLV2461, TLV2462, TLV2463, TLV2464, TLV2465, TLV246xA

FAMILY OF LOW-POWER RAIL-TO-RAIL INPUT/OUTPUT

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35

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MECHANICAL DATA

P (R-PDIP-T8)  

PLASTIC DUAL-IN-LINE PACKAGE

4040082 / B 03/95

0.310 (7,87)

0.290 (7,37)

0.010 (0,25) NOM

0.400 (10,60)

0.355 (9,02)

5

8

4

1

0.020 (0,51) MIN

0.070 (1,78) MAX

0.240 (6,10)

0.260 (6,60)

0.200 (5,08) MAX

0.125 (3,18) MIN

0.015 (0,38)

0.021 (0,53)

Seating Plane

M

0.010 (0,25)

0.100 (2,54)

0

°

– 15

°

NOTES: A. All linear dimensions are in inches (millimeters).

B. This drawing is subject to change without notice.

C. Falls within JEDEC MS-001

background image

TLV2460, TLV2461, TLV2462, TLV2463, TLV2464, TLV2465, TLV246xA

FAMILY OF LOW-POWER RAIL-TO-RAIL INPUT/OUTPUT

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SLOS220F – JULY 1998 – REVISED OCTOBER 1999

36

POST OFFICE BOX 655303 

 DALLAS, TEXAS 75265

MECHANICAL DATA

PW (R-PDSO-G**)   

PLASTIC SMALL-OUTLINE PACKAGE

4040064 / E 08/96

14 PIN SHOWN

Seating Plane

1,20 MAX

1

A

7

14

0,19

4,50

4,30

8

6,20

6,60

0,30

0,75

0,50

0,25

Gage Plane

0,15 NOM

0,65

M

0,10

0

°

– 8

°

0,10

PINS **

A  MIN

A  MAX

DIM

2,90

3,10

8

4,90

5,10

14

6,60

6,40

4,90

5,10

16

7,70

20

7,90

24

9,60

9,80

28

0,15

0,05

NOTES: A. All linear dimensions are in millimeters.

B. This drawing is subject to change without notice.

C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.

D. Falls within JEDEC MO-153

background image

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Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue

any product or service without notice, and advise customers to obtain the latest version of relevant information

to verify, before placing orders, that information being relied on is current and complete. All products are sold

subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those

pertaining to warranty, patent infringement, and limitation of liability.

TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in

accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent

TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily

performed, except those mandated by government requirements.

CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF

DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL

APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR

WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER

CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO

BE FULLY AT THE CUSTOMER’S RISK.

In order to minimize risks associated with the customer’s applications, adequate design and operating

safeguards must be provided by the customer to minimize inherent or procedural hazards.

TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent

that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other

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semiconductor products or services might be or are used. TI’s publication of information regarding any third

party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.

Copyright 

©

 1999, Texas Instruments Incorporated