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 SN54ALS373, SN54AS373, SN74ALS373A, SN74AS373

 OCTAL TRANSPARENT D-TYPE LATCHES

 WITH 3-STATE OUTPUTS

 SDAS083B – APRIL 1982 – REVISED DECEMBER 1994

 

Copyright 

©

 1994, Texas Instruments Incorporated

 

1

POST OFFICE BOX 655303 

 DALLAS, TEXAS 75265

Eight Latches in a Single Package

3-State Bus-Driving True Outputs

Full Parallel Access for Loading

Buffered Control Inputs

pnp Inputs Reduce dc Loading on Data

Lines

Package Options Include Plastic

Small-Outline (DW) Packages, Ceramic

Chip Carriers (FK), and Standard Plastic (N)

and Ceramic (J) 300-mil DIPs

These octal transparent D-type latches feature

3-state outputs designed specifically for driving

highly capacitive or relatively low-impedance

loads. They are particularly suitable for

implementing buffer registers, I/O ports,

bidirectional bus drivers, and working registers.

While the latch-enable (LE) input is high, the Q

outputs follow the data (D) inputs. When LE is

taken low, the Q outputs are latched at the logic

levels set up at the D inputs.

A buffered output-enable (OE) input can be used

to place the eight outputs in either a normal logic

state (high or low) or a high-impedance state. In

the high-impedance state, the outputs neither load

nor drive the bus lines significantly. The

high-impedance state and the increased drive

provide the capability to drive bus lines without

interface or pullup components.

OE does not affect internal operations of the latches. Old data can be retained or new data can be entered while

the outputs are off.

The SN54ALS373 and SN54AS373 are characterized for operation over the full military temperature range of

– 55

°

C to 125

°

C. The SN74ALS373A and SN74AS373 are characterized for operation from 0

°

C to 70

°

C.

FUNCTION TABLE

(each latch)

INPUTS

OUTPUT

OE

LE

D

Q

L

H

H

H

L

H

L

L

L

L

X

Q0

H

X

X

Z

1

2

3

4

5

6

7

8

9

10

20

19

18

17

16

15

14

13

12

11

OE

1Q

1D

2D

2Q

3Q

3D

4D

4Q

GND

V

CC

8Q

8D

7D

7Q

6Q

6D

5D

5Q

LE

SN54ALS373, SN54AS373 . . . J  PACKAGE

SN74ALS373A, SN74AS373 . . . DW OR N PACKAGE

(TOP VIEW)

3

2 1 20 19

9 10 11 12 13

4

5

6

7

8

18

17

16

15

14

8D

7D

7Q

6Q

6D

2D

2Q

3Q

3D

4D

 SN54ALS373, SN54AS373 . . . FK PACKAGE

(TOP VIEW)

1D

1Q

OE

5Q

5D

8Q

4Q

GND

LE

V

CC

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

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SN54ALS373, SN54AS373, SN74ALS373A, SN74AS373

OCTAL TRANSPARENT D-TYPE LATCHES

WITH 3-STATE OUTPUTS

   

SDAS083B – APRIL 1982 – REVISED DECEMBER 1994

2

POST OFFICE BOX 655303 

 DALLAS, TEXAS 75265

logic symbol

logic diagram (positive logic)

OE

1D

3

1D

4

2D

7

3D

8

4D

13

5D

C1

11

LE

1Q

2

2Q

5

3Q

6

4Q

9

5Q

12

6Q

15

7Q

16

8Q

19

14

6D

17

7D

18

8D

EN

1

OE

LE

1D

1Q

1

11

3

2

To Seven Other Channels

C1

1D

† This symbol is in accordance with ANSI/IEEE Std 91-1984 and

IEC Publication 617-12.

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

Supply voltage, V

CC

 

 7 V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

Input voltage, V

I

 

 7 V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

Voltage applied to any output in the high state or power-off state 

 5.5 V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

Operating free-air temperature range, T

A

: SN54ALS373  

– 55

°

C to 125

°

C

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

SN74ALS373A  

0

°

C to 70

°

C

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

Storage temperature range 

 – 65

°

C to 150

°

C

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

‡ Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and

functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not

implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

recommended operating conditions

SN54ALS373

SN74ALS373A

UNIT

MIN

NOM

MAX

MIN

NOM

MAX

UNIT

VCC

Supply voltage

4.5

5

5.5

4.5

5

5.5

V

VIH

High-level input voltage

2

2

V

VIL

Low-level input voltage

0.7

0.8

V

IOH

High-level output current

– 1

– 2.6

mA

IOL

Low-level output current

12

24

mA

tw

Pulse duration, LE high

12

10

ns

tsu

Setup time, data before LE

10

10

ns

th

Hold time, data after LE

7

7

ns

TA

Operating free-air temperature

– 55

125

0

70

°

C

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 SN54ALS373, SN54AS373, SN74ALS373A, SN74AS373

 OCTAL TRANSPARENT D-TYPE LATCHES

 WITH 3-STATE OUTPUTS

 

SDAS083B – APRIL 1982 – REVISED DECEMBER 1994

3

POST OFFICE BOX 655303 

 DALLAS, TEXAS 75265

electrical characteristics over recommended operating free-air temperature range (unless

otherwise noted)

PARAMETER

TEST CONDITIONS

SN54ALS373

SN74ALS373A

UNIT

PARAMETER

TEST CONDITIONS

MIN

TYP†

MAX

MIN

TYP†

MAX

UNIT

VIK

VCC = 4.5 V,

II = – 18 mA

– 1.5

– 1.5

V

VCC = 4.5 V to 5.5 V,

IOH = – 0.4 mA

VCC  – 2

VCC  – 2

VOH

VCC = 4 5 V

IOH = – 1 mA

2.4

3.3

V

VCC = 4.5 V

IOH = – 2.6 mA

2.4

3.2

VOL

VCC = 4 5 V

IOL = 12 mA

0.25

0.4

0.25

0.4

V

VOL

VCC = 4.5 V

IOL = 24 mA

0.35

0.5

V

IOZH

VCC = 5.5 V,

VO = 2.7 V

20

20

µ

A

IOZL

VCC = 5.5 V,

VO = 0.4 V

– 20

– 20

µ

A

II

VCC = 5.5 V,

VI = 7 V

0.1

0.1

mA

IIH

VCC = 5.5 V,

VI = 2.7 V

20

20

µ

A

IIL

VCC = 5.5 V,

VI = 0.4 V

– 0.1

– 0.1

mA

IO‡

VCC = 5.5 V,

VO = 2.25 V

– 20

– 112

– 30

– 112

mA

Outputs high

9

16

9

16

ICC

VCC = 5.5 V

Outputs low

16

25

16

25

mA

Outputs disabled

17

27

17

27

† All typical values are at VCC = 5 V, TA = 25

°

C.

‡ The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS.

switching characteristics (see Figure 1)

PARAMETER

FROM

(INPUT)

TO

(OUTPUT)

VCC = 4.5 V to 5.5 V,

CL = 50 pF,

R1 = 500 

,

R2 = 500 

,

TA = MIN to MAX§

UNIT

SN54ALS373

SN74ALS373A

MIN

MAX

MIN

MAX

tPLH

D

Q

2

17

2

12

ns

tPHL

D

Q

1

19

4

16

ns

tPLH

LE

An Q

6

29

6

22

ns

tPHL

LE

Any Q

1

27

7

23

ns

tPZH

OE

An Q

6

22

1

18

ns

tPZL

OE

Any Q

5

24

5

20

ns

tPHZ

OE

Any Q

2

16

1

10

ns

tPLZ

OE

Any Q

2

24

2

12

ns

§ For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.

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SN54ALS373, SN54AS373, SN74ALS373A, SN74AS373

OCTAL TRANSPARENT D-TYPE LATCHES

WITH 3-STATE OUTPUTS

   

SDAS083B – APRIL 1982 – REVISED DECEMBER 1994

4

POST OFFICE BOX 655303 

 DALLAS, TEXAS 75265

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

Supply voltage, V

CC

 

 7 V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

Input voltage, V

I

 

 7 V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

Voltage applied to any output in the high state or power-off state 

 5.5 V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

Operating free-air temperature range, T

A

: SN54AS373  

– 55

°

C to 125

°

C

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

SN74AS373  

0

°

C to 70

°

C

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

Storage temperature range 

 – 65

°

C to 150

°

C

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and

functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not

implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

recommended operating conditions

SN54AS373

SN74AS373

UNIT

MIN

NOM

MAX

MIN

NOM

MAX

UNIT

VCC

Supply voltage

4.5

5

5.5

4.5

5

5.5

V

VIH

High-level input voltage

2

2

V

VIL

Low-level input voltage

0.8

0.8

V

IOH

High-level output current

– 12

– 15

mA

IOL

Low-level output current

32

48

mA

tw*

Pulse duration, LE high

5.5

4.5

ns

tsu*

Setup time, data before LE

2

2

ns

th*

Hold time, data after LE

3

3

ns

TA

Operating free-air temperature

– 55

125

0

70

°

C

* On products compliant to MIL-STD-883, Class B, this parameter is based on characterization data but is not production tested.

electrical characteristics over recommended operating free-air temperature range (unless

otherwise noted)

PARAMETER

TEST CONDITIONS

SN54AS373

SN74AS373

UNIT

PARAMETER

TEST CONDITIONS

MIN

TYP‡

MAX

MIN

TYP‡

MAX

UNIT

VIK

VCC = 4.5 V,

II = – 18 mA

– 1.2

– 1.2

V

VCC = 4.5 V to 5.5 V,

IOH = – 2 mA

VCC  – 2

VCC  – 2

VOH

VCC = 4 5 V

IOH = – 12 mA

2.4

3.2

V

VCC = 4.5 V

IOH = – 15 mA

2.4

3.3

VOL

VCC = 4 5 V

IOL = 32 mA

0.27

0.5

V

VOL

VCC = 4.5 V

IOL = 48 mA

0.32

0.5

V

IOZH

VCC = 5.5 V,

VO = 2.7 V

50

50

µ

A

IOZL

VCC = 5.5 V,

VO = 0.4 V

– 50

– 50

µ

A

II

VCC = 5.5 V,

VI = 7 V

0.1

0.1

mA

IIH

VCC = 5.5 V,

VI = 2.7 V

20

20

µ

A

IIL

VCC = 5.5 V,

VI = 0.4 V

– 0.02

– 0.5

– 0.02

– 0.5

mA

IO§

VCC = 5.5 V,

VO = 2.25 V

– 30

– 112

– 30

– 112

mA

Outputs high

55

90

55

90

ICC

VCC = 5.5 V

Outputs low

55

85

55

85

mA

Outputs disabled

65

100

65

100

‡ All typical values are at VCC = 5 V, TA = 25

°

C.

§ The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS.

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 SN54ALS373, SN54AS373, SN74ALS373A, SN74AS373

 OCTAL TRANSPARENT D-TYPE LATCHES

 WITH 3-STATE OUTPUTS

 

SDAS083B – APRIL 1982 – REVISED DECEMBER 1994

5

POST OFFICE BOX 655303 

 DALLAS, TEXAS 75265

switching characteristics (see Figure 1)

PARAMETER

FROM

(INPUT)

TO

(OUTPUT)

VCC = 4.5 V to 5.5 V,

CL = 50 pF,

R1 = 500 

,

R2 = 500 

,

TA = MIN to MAX†

UNIT

SN54AS373

SN74AS373

MIN

MAX

MIN

MAX

tPLH

D

Q

3

9

3.5

6

ns

tPHL

D

Q

3

8

3.5

6

ns

tPLH

LE

An Q

6.5

14.5

6.5

11.5

ns

tPHL

LE

Any Q

5

9

5

7.5

ns

tPZH

OE

An Q

2

7.5

2

6.5

ns

tPZL

OE

Any Q

4.5

10.5

4.5

9.5

ns

tPHZ

OE

Any Q

3

10

3

6.5

ns

tPLZ

OE

Any Q

3

8

3

7

ns

† For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.

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SN54ALS373, SN54AS373, SN74ALS373A, SN74AS373

OCTAL TRANSPARENT D-TYPE LATCHES

WITH 3-STATE OUTPUTS

   

SDAS083B – APRIL 1982 – REVISED DECEMBER 1994

6

POST OFFICE BOX 655303 

 DALLAS, TEXAS 75265

PARAMETER MEASUREMENT INFORMATION

SERIES 54ALS/ 74ALS AND 54AS/ 74AS DEVICES

tPHZ

tPLZ

tPHL

tPLH

0.3 V

tPZL

tPZH

tPLH

tPHL

LOAD CIRCUIT

FOR 3-STATE OUTPUTS

From Output

Under Test

Test 

Point

R1

S1

CL

(see Note A)

7 V

1.3 V

1.3 V

1.3 V

3.5 V

3.5 V

0.3 V

0.3 V

th

tsu

VOLTAGE WAVEFORMS

SETUP AND HOLD TIMES

Timing

Input

Data

Input

1.3 V

1.3 V

3.5 V

3.5 V

0.3 V

0.3 V

High-Level

Pulse

Low-Level

Pulse

tw

VOLTAGE WAVEFORMS

PULSE DURATIONS

Input

Out-of-Phase

Output

(see Note C)

1.3 V

1.3 V

1.3 V

1.3 V

1.3 V

1.3 V

1.3 V

1.3 V

1.3 V

1.3 V

3.5 V

3.5 V

0.3 V

0.3 V

VOL

VOH

VOH

VOL

Output

Control

(low-level

enabling)

Waveform 1

S1 Closed

(see Note B)

Waveform 2

S1 Open

(see Note B)

[

0 V

VOH

VOL

[

3.5 V

In-Phase

Output

0.3 V

1.3 V

1.3 V

VOLTAGE WAVEFORMS

PROPAGATION DELAY TIMES

VOLTAGE WAVEFORMS

ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS

R2

VCC

RL

Test 

Point

From Output

Under Test

CL

(see Note A)

LOAD CIRCUIT

FOR OPEN-COLLECTOR OUTPUTS

LOAD CIRCUIT FOR 

BI-STATE

TOTEM-POLE OUTPUTS

From Output

Under Test

Test 

Point

CL

(see Note A)

RL

RL = R1 = R2

NOTES: A. CL includes probe and jig capacitance.

B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.

Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.

C. When measuring propagation delay items of 3-state outputs, switch S1 is open.

D. All input pulses have the following characteristics: PRR 

 1 MHz, tr = tf = 2 ns, duty cycle = 50%.

E. The outputs are measured one at a time with one transition per measurement.

Figure 1. Load Circuits and Voltage Waveforms

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any product or service without notice, and advise customers to obtain the latest version of relevant information

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subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those

pertaining to warranty, patent infringement, and limitation of liability.

TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in

accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent

TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily

performed, except those mandated by government requirements.

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DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL

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BE FULLY AT THE CUSTOMER’S RISK.

In order to minimize risks associated with the customer’s applications, adequate design and operating

safeguards must be provided by the customer to minimize inherent or procedural hazards.

TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent

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party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.

Copyright 

©

 1998, Texas Instruments Incorporated