background image

TL7702B, TL7705B

SUPPLY-VOLTAGE SUPERVISORS

 

 

SLVS037H – SEPTEMBER 1989 – REVISED JULY 1999

1

POST OFFICE BOX 655303 

 DALLAS, TEXAS 75265

D

Power-On Reset Generator

D

Automatic Reset Generation After

Voltage Drop

D

RESET Output Defined From V

CC

 

 1 V

D

Precision Voltage Sensor

D

Temperature-Compensated Voltage

Reference

D

True and Complement Reset Outputs

D

Externally Adjustable Pulse Duration

description

The TL7702B and TL7705B are integrated-circuit

supply-voltage supervisors designed for use as

reset controllers in microcomputer and

microprocessor systems. The supply-voltage

supervisor monitors the supply for undervoltage

conditions at the SENSE input. During power up,

the RESET output becomes active (low) when

V

CC

 attains a value approaching 1 V. As V

CC

approaches 3 V (assuming that SENSE is above

V

T+

), the delay timer function activates a time

delay, after which outputs RESET and RESET go

inactive (high and low, respectively). When an

undervoltage condition occurs during normal

operation, outputs RESET and RESET go active.

To ensure that a complete reset occurs, the reset

outputs remain active for a time delay after the

voltage at the SENSE input exceeds the

positive-going threshold value. The time delay is

determined by the value of the external capacitor

C

T

: t

 2.6 

×

 10

4

 

×

 C

T

, where C

T

 is in farads (F)

and t

d

 is in seconds (s).

An external capacitor (typically 0.1 

µ

F) must be

connected to REF to reduce the influence of fast

transients in the supply voltage.

The TL7702BC and TL7705BC are characterized for operation from 0

°

C to 70

°

C. The TL7702BI and TL7705BI

are characterized for operation from –40

°

C to 85

°

C. The TL7705BQ is characterized for operation from –40

°

C

to 125

°

C. The TL7705BM is characterized for operation from –55

°

C to 125

°

C.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

Copyright 

©

 1999, Texas Instruments Incorporated

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

3

2 1 20 19

9 10 11 12 13

4

5

6

7

8

18

17

16

15

14

NC

SENSE

NC

RESET

NC

NC

RESIN

NC

CT

NC

TL7705BM . . . FK  PACKAGE

(TOP VIEW)

NC

REF

NC

RESET

NC

V

NC

NC

GND

NC

CC

1

2

3

4

8

7

6

5

REF

RESIN

CT

GND

V

CC

SENSE

RESET

RESET

TL77xxBC . . . D  OR  P  PACKAGE

TL7705BM . . . JG PACKAGE

TL7705BQ . . . D  PACKAGE

(TOP VIEW)

1

2

3

4

5

10

9

8

7

6

NC

REF

RESIN

CT

GND

NC

V

CC

SENSE

RESET

RESET

TL7705BM . . . U  PACKAGE

(TOP VIEW)

NC – No internal connection

NC – No internal connection

On products compliant to MIL-PRF-38535, all parameters are tested

unless otherwise noted. On all other products, production

processing does not necessarily include testing of all parameters.

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TL7702B, TL7705B

SUPPLY-VOLTAGE SUPERVISORS

 

 

SLVS037H – SEPTEMBER 1989 – REVISED JULY 1999

2

POST OFFICE BOX 655303 

 DALLAS, TEXAS 75265

AVAILABLE OPTIONS

PACKAGED DEVICES

TA

SMALL

OUTLINE

(D)

CHIP

CARRIER

(FK)

CERAMIC

DIP

(JG)

PLASTIC

DIP

(P)

CERAMIC

FLATPACK

(U)

CHIP FORM

(Y)

0

°

C to 70

°

C

TL7702BCD

TL7702BCP

0

°

C to 70

°

C

TL7705BCD

TL7705BCP

40

°

C to 85

°

C

TL7702BID

TL7702BIP

TL7702BY,

–40

°

C to 85

°

C

TL7705BID

TL7705BIP

TL7702BY,

TL7705BY

–40

°

C to 125

°

C

TL7705BQD

55

°

C to 125

°

C

TL7702BMFK

TL7702BMJG

TL7702BMU

–55

°

C to 125

°

C

TL7705BMFK

TL7705BMJG

TL7705BMU

The D package is available taped and reeled. Add the suffix R to device type (e.g., TL7702BCDR). Chip forms are tested at

25

°

C.

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TL7702B, TL7705B

SUPPLY-VOLTAGE SUPERVISORS

 

 

SLVS037H – SEPTEMBER 1989 – REVISED JULY 1999

3

POST OFFICE BOX 655303 

 DALLAS, TEXAS 75265

functional block diagram

The functional block diagram is shown for illustrative purposes only; the actual circuit includes a trimming

network to adjust the reference voltage and sense-comparator trip point.

RESIN

 70 

µ

A

R1

(see Note A)

R2

(see Note A)

Reference

Voltage

SENSE

GND

VCC

CT

RESET

RESET

REF

8

3

7

2

4

6

5

1

Pin numbers shown are for the D, JG, and P packages.

NOTE A: TL7702B: R1 = 0 

, R2 = open

TL7705B: R1 = 23 k

, R2 = 10 k

, nominal

typical timing diagram

VIT–

RESET

Vres

0

td

0

VCC and

SENSE

td

VIT–

VIT+

VIT+

Vres

ÎÎÎÎÎ

ÎÎÎÎÎ

Output

Undefined

ÎÎÎÎ

ÎÎÎÎ

Output

Undefined

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TL7702B, TL7705B

SUPPLY-VOLTAGE SUPERVISORS

 

 

SLVS037H – SEPTEMBER 1989 – REVISED JULY 1999

4

POST OFFICE BOX 655303 

 DALLAS, TEXAS 75265

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

Supply voltage, V

CC

 (see Note 1) 

20 V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

Input voltage range, V

I

: RESIN 

–0.3 V to 20 V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

SENSE 

–0.3 V to 20 V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

High-level output current, I

OH

 (RESET) 

–30 mA

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

Low-level output current, I

OL

 (RESET) 30 

mA

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

Package thermal impedance, 

θ

JA

 (see Notes 2 and 3): D package

97

°

C/W

. . . . . . . . . . . . . . . . . . . . . . . . . . . . 

P package

127

°

C/W

. . . . . . . . . . . . . . . . . . . . . . . . . . . . 

Case temperature for 60 seconds, T

C

: FK package 

260

°

C

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: JG or U packages 

300

°

C

. . . . . . . . . . . . . . 

Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D or P packages 

260

°

C

. . . . . . . . . . . . . . . . 

Storage temperature range, T

stg

  

–65

°

C to 150

°

C

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and

functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not

implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES:

1. All voltage values are with respect to the network ground terminal.

2. Maximum power dissipation is a function of TJ(max), 

θ

JA, and TA. The maximum allowable power dissipation at any allowable

ambient temperature is PD = (TJ(max) – TA)/

θ

JA. Operating at the absolute maximum TJ of 150

°

C can impact reliability.

3. The package thermal impedance is calculated in accordance with JESD 51, except for through-hole packages, which use a trace

length of zero.

recommended operating conditions

MIN

MAX

UNIT

Supply voltage, VCC

3.6

18

V

High-level input voltage, VIH

RESIN

2

18

V

Low-level input voltage, VIL

RESIN

0

0.8

V

Input voltage, VI

SENSE

0

18

V

High-level output current, IOH

RESET

–16

mA

Low-level output current, IOL

RESET

16

mA

TL770xBC

0

70

Operating free air temperature range TA

TL770xBI

–40

85

°

C

Operating free-air temperature range, TA

TL7705BQ

–40

125

°

C

TL7705BM

–55

125

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TL7702B, TL7705B

SUPPLY-VOLTAGE SUPERVISORS

 

 

SLVS037H – SEPTEMBER 1989 – REVISED JULY 1999

5

POST OFFICE BOX 655303 

 DALLAS, TEXAS 75265

electrical characteristics over recommended operating conditions (unless otherwise noted)

PARAMETER

TEST CONDITIONS†

TL77xxBC

TL77xxBI

TL7705BQ

UNIT

MIN

TYP

MAX

VOH

High-level output voltage, RESET

IOH = –16 mA

VCC–1.5

V

VOL

Low-level output voltage, RESET

IOL = 16 mA

0.4

V

Vref

Reference voltage

Iref = 500 

µ

A,

TA = 25

°

C

2.48

2.53

2.58

V

TL7702B

TA = 25

°

C

2.505

2.53

2.555

VIT

Negative-going

input threshold voltage

TL7705B

TA = 25

°

C

4.5

4.55

4.6

V

VIT–

input threshold voltage

at SENSE input

TL7702B

T

f ll range‡

2.48

2.53

2.58

V

at SENSE in ut

TL7705B

TA = full range‡

4.45

4.55

4.65

Vh

Hysteresis, SENSE

TL7702B

VCC = 3 6 V to 18 V

TA = 25

°

C

10

mV

Vhys

y

,

(VIT+ – VIT–)

TL7705B

VCC = 3.6 V to 18 V,

TA = 25

°

C

30

mV

Vres§

Power-up reset voltage

IOL at RESET = 2 mA,

TA = 25

°

C

1

V

II

Input current

RESIN

VI = 0.4 V to VCC

–10

µ

A

II

Input current

SENSE

TL7702B

VI = Vref to 18 V

–0.1

–2

µ

A

IOH

High-level output current, RESET

VO = 18 V,

See Figure 1

50

µ

A

IOL

Low-level output current, RESET

VO = 0 V,

See Figure 1

–50

µ

A

ICC

Supply current

VSENSE = 15 V,

RESIN 

 2 V

1.8

3

mA

ICC

Supply current

VCC = 18 V,

TA = full range‡

3.5

mA

† All electrical characteristics are measured with 0.1-

µ

F capacitors connected at REF, CT, and VCC to GND.

‡ Full range is 0

°

C to 70

°

C for the C-suffix devices, –40

°

C to 85

°

C for the I-suffix devices, and –40

°

C to 125

°

C for the Q-suffix device.

§ This is the lowest voltage at which RESET becomes active.

switching characteristics, V

CC

 = 5 V, CT open, T

A

 = 25

°

C

PARAMETER

FROM

(INPUT)

TO

(OUTPUT)

TEST CONDITIONS

TL77xxBC

TL77xxBI

TL7705BQ

UNIT

(

)

(

)

MIN

TYP

MAX

tPLH

Propagation delay time from

low- to high-level output

RESIN

RESET

See Figures 1 2 and 3

270

500

ns

tPHL

Propagation delay time from

high- to low-level output

RESIN

RESET

See Figures 1, 2, and 3

270

500

ns

t

Effective pulse duration

RESIN

See Figure 2

150

ns

tw

Effective pulse duration

SENSE

See Figure 2

100

ns

tr

Rise time

RESET

75

ns

tf

Fall time

RESET

See Figures 1 and 3

150

200

ns

tr

Rise time

RESET

See Figures 1 and 3

75

150

ns

tf

Fall time

RESET

50

ns

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TL7702B, TL7705B

SUPPLY-VOLTAGE SUPERVISORS

 

 

SLVS037H – SEPTEMBER 1989 – REVISED JULY 1999

6

POST OFFICE BOX 655303 

 DALLAS, TEXAS 75265

electrical characteristics over recommended operating conditions (unless otherwise noted)

PARAMETER

TEST CONDITIONS†

TL7705BM

UNIT

PARAMETER

TEST CONDITIONS†

MIN

TYP

MAX

UNIT

VOH

High-level output voltage, RESET

IOH = –16 mA

VCC–1.5

V

VOL

Low-level output voltage, RESET

IOL = 16 mA

0.4

V

Vref

Reference voltage

Iref = 500 

µ

A,

TA = 25

°

C

2.48

2.53

2.58

V

TL7702B

TA = 25

°

C

2.505

2.53

2.555

VIT

Negative-going

input threshold voltage

TL7705B

TA = 25

°

C

4.5

4.55

4.6

V

VIT–

input threshold voltage

at SENSE input

TL7702B

T

55

°

C to 125

°

C

2.48

2.53

2.58

V

at SENSE in ut

TL7705B

TA = –55

°

C to 125

°

C

4.45

4.55

4.65

Vh

Hysteresis, SENSE

TL7702B

VCC = 3 6 V to 18 V

TA = 25

°

C

10

mV

Vhys

y

,

(VIT+ – VIT–)

TL7705B

VCC = 3.6 V to 18 V,

TA = 25

°

C

30

mV

Vres‡

Power-up reset voltage

IOL at RESET = 2 mA,

TA = 25

°

C

1

V

II

Input current

RESIN

VI = 0.4 V to VCC

–10

µ

A

II

Input current

SENSE

TL7702B

VI = Vref to VCC – 1.5 V

–0.1

–2

µ

A

IOH

High-level output current, RESET

VO = 18 V

50

µ

A

IOL

Low-level output current, RESET

VO = 0

–50

µ

A

VSENSE = 15 V,

RESIN 

 2 V

1.8

3

ICC

Supply current

VCC = 18 V,

TA =  –55

°

C to

125

°

C

4

mA

† All electrical characteristics are measured with 0.1-

µ

F capacitors connected at REF, CT, and VCC to GND.

‡ This is the lowest value at which RESET becomes active.

switching characteristics, V

CC

 = 5 V, CT open, T

A

 = 25

°

C

PARAMETER

FROM

TO

TEST CONDITIONS

TL7705BM

UNIT

PARAMETER

(INPUT)

(OUTPUT)

TEST CONDITIONS

MIN

TYP

MAX

UNIT

tPLH

Propagation delay time from

low- to  high-level output

RESIN

RESET

See Figures 1 2 and 3

270

500*

ns

tPHL

Propagation delay time from

high- to low-level output

RESIN

RESET

See Figures 1, 2, and 3

270

500*

ns

t

Effective pulse duration

RESIN

See Figure 2

150

ns

tw

Effective pulse duration

SENSE

See Figure 2

100

ns

tr

Rise time

RESET

75*

ns

tf

Fall time

RESET

See Figures 1 and 3

150

200*

ns

tr

Rise time

RESET

See Figures 1 and 3

75

150*

ns

tf

Fall time

RESET

50*

ns

* On products compliant to MIL-PRF-38535, these parameters are not production tested.

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TL7702B, TL7705B

SUPPLY-VOLTAGE SUPERVISORS

 

 

SLVS037H – SEPTEMBER 1989 – REVISED JULY 1999

7

POST OFFICE BOX 655303 

 DALLAS, TEXAS 75265

electrical characteristics over recommended operating conditions, T

A

 = 25

°

C (unless otherwise

noted)

PARAMETER

TEST CONDITIONS†

TL7702BY

TL7705BY

UNIT

MIN

TYP

MAX

VOH

High-level output voltage, RESET

IOH = –16 mA

VCC–1.5

V

VOL

Low-level output voltage, RESET

IOL = 16 mA

0.4

V

Vref

Reference voltage

Iref = 500 

µ

A

2.48

2.53

2.58

V

VIT

Negative-going input threshold voltage

TL7702BY

2.505

2.53

2.555

V

VIT–

g

g

g

g

at SENSE input

TL7705BY

4.5

4.55

4.6

V

Vh

Hysteresis SENSE (VIT

VIT )

TL7702BY

VCC = 3 6 V to 18 V

10

mV

Vhys

Hysteresis, SENSE (VIT+ – VIT–)

TL7705BY

VCC = 3.6 V to 18 V

30

mV

Vres‡

Power-up reset voltage

IOL at RESET = 2 mA

1

V

II

Input current

RESIN

VI = 0.4 V to VCC

–10

µ

A

II

Input current

SENSE

TL7702BY

VI = Vref to 18 V

–0.1

–2

µ

A

IOH

High-level output current, RESET

VO = 18 V,

See Figure 1

50

µ

A

IOL

Low-level output current, RESET

VO = 0 V,

See Figure 1

–50

µ

A

ICC

Supply current

VSENSE = 15 V,

RESIN 

 2 V

1.8

3

mA

† All electrical characteristics are measured with 0.1-

µ

F capacitors connected at REF, CT, and VCC to GND.

‡ This is the lowest voltage at which RESET becomes active.

switching characteristics, V

CC

 = 5 V, CT open, T

A

 = 25

°

C

PARAMETER

FROM

(INPUT)

TO

(OUTPUT)

TEST CONDITIONS

TL7702BY

TL7705BY

UNIT

(INPUT)

(OUTPUT)

MIN

TYP

MAX

tPLH

Propagation delay time from

low- to  high-level output

RESIN

RESET

See Figures 1 2 and 3

270

500

ns

tPHL

Propagation delay time from

high- to low-level output

RESIN

RESET

See Figures 1, 2, and 3

270

500

ns

t

Effective pulse duration

RESIN

See Figure 2

150

ns

tw

Effective pulse duration

SENSE

See Figure 2

100

ns

tr

Rise time

RESET

75

ns

tf

Fall time

RESET

See Figures 1 and 3

150

200

ns

tr

Rise time

RESET

See Figures 1 and 3

75

150

ns

tf

Fall time

RESET

50

ns

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TL7702B, TL7705B

SUPPLY-VOLTAGE SUPERVISORS

 

 

SLVS037H – SEPTEMBER 1989 – REVISED JULY 1999

8

POST OFFICE BOX 655303 

 DALLAS, TEXAS 75265

PARAMETER MEASUREMENT INFORMATION

15 pF

(see Note B)

RESET

DUT

GND

5 V

RL

(see Note A)

RESET OUTPUT CONFIGURATION

VCC

5 V

DUT

RESET

RESET OUTPUT CONFIGURATION

NOTES: A. For IOL and IOH, RL = 10 k

. For all switching characteristics, RL = 511 

.

B. This figure includes jig and probe capacitance.

RL

(see Note A)

15 pF

(see Note B)

Figure 1. RESET and RESET Output Configurations

tw

5 V

2.5 V

0 V

RESIN

SENSE

VT + 2 V

WAVEFORMS

VT – 2 V

VT

tw

Figure 2. Input Pulse Definition

10%

VIT+

VIT–

VIT+

0 V

VIH

VIL

2 V

0.8 V

tPLH

50%

50%

10%

10%

90%

10%

td

SENSE

Undefined

RESET

Voltage

Fault

tf

tr

90%

tf

td

tr

RESIN

RESET

Î

Î

td

tPHL

10%

90%

90%

VOH

VOL

Figure 3. Voltage Waveforms

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TL7702B, TL7705B

SUPPLY-VOLTAGE SUPERVISORS

 

 

SLVS037H – SEPTEMBER 1989 – REVISED JULY 1999

9

POST OFFICE BOX 655303 

 DALLAS, TEXAS 75265

TYPICAL CHARACTERISTICS

Figure 4

14

10

8

6

0

2

4

6

8

10

– 

Assertion 

T

ime – ns

18

20

ASSERTION TIME

vs

LOAD RESISTANCE

16

12

RL – Load Resistance – k

VCC = 5 V

CT = 0.1 

µ

F

CL = 10 pF

TA = 25

°

C

RESET tr

RESET tf

Figure 5

400

200

100

0

0

2

4

6

8

10

t – Deassertion T

ime – ns

600

700

DEASSERTION TIME

vs

LOAD RESISTANCE

500

300

RL – Load Resistance – k

VCC = 5 V

CT = 0.1 

µ

F

CL = 10 pF

TA = 25

°

C

RESET tf

RESET tr

RESET tr

RESET tf

Figure 6

24

18

12

6

0

25

50

75

100

125

– 

Assertion 

T

ime – ns

30

36

ASSERTION TIME

vs

LOAD CAPACITANCE

150

175

200

VCC = 5 V

CT = 0.1 

µ

F

RL = 4.7 k

TA = 25

°

C

RESET tr

RESET tf

CL – Load Capacitance – pF

Figure 7

0.9

0.7

0.5

0.3

0

25

50

75

100

125

t – Deassertion T

ime –

1.1

1.3

DEASSERTION TIME

vs

LOAD CAPACITANCE

150

175

200

1.7

1.5

1.9

2.1

VCC = 5 V

CT = 0.1 

µ

F

RL = 4.7 k

TA = 25

°

C

RESET tf and RESET tr

CL – Load Capacitance – pF

µ

s

† For proper operation, both RESET and RESET should be terminated with resistors of similar value. Failure to do so may cause unwanted

plateauing in either output waveform during switching.

background image

TL7702B, TL7705B

SUPPLY-VOLTAGE SUPERVISORS

 

 

SLVS037H – SEPTEMBER 1989 – REVISED JULY 1999

10

POST OFFICE BOX 655303 

 DALLAS, TEXAS 75265

APPLICATION INFORMATION

VS

10 k

0.1 

µ

F

SENSE

RESIN

GND

REF

RESET

RESET

VCC

CT

To System

RESET

RT

CT

System Supply

Reset Input

(from system)

To System

RESET

(see text)

7

2

1

3

5

6

8

4

10 k

Figure 8. System Reset Controller With Undervoltage Sensing

When the TL770xB SENSE terminal is used to monitor V

CC

, a current-limiting resistor in series with C

T

 is

recommended. During normal operation, the timing capacitor is charged by the onboard current source to

approximately V

CC

 or an internal voltage clamp (

7.1-V zener), whichever is less. When the circuit is then subjected

to an undervoltage condition during which V

CC

 is rapidly slewed down, the voltage on CT exceeds that on V

CC

. This

forward biases a secondary path internally, which falsely activates the outputs. A fault is indicated when V

CC

 drops

below V

(CT)

, not when V

SENSE

 falls below V

T–

.

Texas Instruments performs a 100% electrical screen to verify that the outputs do not switch with 1 mA forced into

the CT terminal. Adding the external resistor, R

T

, prevents false triggering. Its value is calculated as follows:

V

(CT)

*

V

T

*

R

T

Where:

V

(CT)

= V

CC

 or 7.1 V, whichever is less

V

T–

= 4.55 V (nom)

R

T

= value of series resistor required

For V

CC

 = 5 V:

5

*

4.55

R

T

t

1 mA

Therefore,

R

T

u

450

W

Using a 20% tolerance resistor, R

T

 should be greater than 560 

.

Adding this series resistor changes the duration of the reset pulse by no more than 10%. R

T

 extends the discharge

of C

T

, but also skews the V

(CT)

 threshold. These effects tend to cancel one another. The precise percentage change

can be derived theoretically, but the equation is complicated by this interaction and is dependent upon the duration

of the supply-voltage fault condition.

Both outputs of the TL770xB should be terminated with similar value resistors, even when only one is being used.

This prevents unwanted plateauing in either output waveform during switching, which may be interpreted as an

undefined state or delay system reset.

background image

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pertaining to warranty, patent infringement, and limitation of liability.

TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in

accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent

TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily

performed, except those mandated by government requirements.

CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF

DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL

APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR

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CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO

BE FULLY AT THE CUSTOMER’S RISK.

In order to minimize risks associated with the customer’s applications, adequate design and operating

safeguards must be provided by the customer to minimize inherent or procedural hazards.

TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent

that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other

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Copyright 

©

 1999, Texas Instruments Incorporated