background image

TL750M, TL751M SERIES

LOW-DROPOUT VOLTAGE REGULATORS

SLVS021H – JANUARY 1988 – REVISED JANUARY 2000

1

POST OFFICE BOX 655303 

 DALLAS, TEXAS 75265

D

Very Low Dropout Voltage, Less Than 0.6 V

at 750 mA

D

Low Quiescent Current

D

TTL- and CMOS-Compatible Enable on

TL751M Series

D

60-V Load-Dump Protection

D

Overvoltage Protection

D

Internal Thermal Overload Protection

D

Internal Overcurrent-Limiting Circuitry

description

The TL750M and TL751M series are low-dropout positive voltage regulators specifically designed for

battery-powered systems. The TL750M and TL751M series incorporate onboard overvoltage and

current-limiting protection circuitry to protect the devices and the regulated system. Both series are fully

protected against 60-V load-dump and reverse-battery conditions. Extremely low quiescent current, even

during full-load conditions, makes the TL750M and TL751M series ideal for standby power systems.

The TL750M and TL751M series offers 5-V, 8-V, 10-V, and 12-V options. The TL751M series has the addition

of an enable (ENABLE) input. The ENABLE input gives the designer complete control over power up, allowing

sequential power up or emergency shutdown. When ENABLE is high, the regulator output is placed in the

high-impedance state. The ENABLE input is TTL- and CMOS-compatible.

The TL750MxxC and TL751MxxC are characterized for operation over the virtual junction temperature range

0

°

C to 125

°

C.

AVAILABLE OPTIONS

PACKAGED DEVICES

TJ

VO

TYP

(V)

HEAT-SINK

MOUNTED

(3-PIN)

(KC)

PLASTIC

FLANGE MOUNT

(KTE)

PLASTIC

FLANGE MOUNT

(KTG)

PLASTIC

FLANGE MOUNT

(KTP)

CHIP

FORM

(Y)

5

TL750M05CKC

TL750M05CKTE

TL751M05CKTG

TL750M05CKTPR

TL750M05Y

0

°

C to 125

°

C

8

TL750M08CKC

TL750M08CKTE

TL751M08CKTG

TL750M08CKTPR

TL750M08Y

0

°

C to 125

°

C

10

TL750M10CKC

TL750M10CKTE

TL751M10CKTG

TL750M10CKTPR

TL750M10Y

12

TL750M12CKC

TL750M12CKTE

TL751M12CKTG

TL750M12CKTPR

TL750M12Y

The KTE and KTG packages are available taped and reeled. The KTP is only available taped and reeled. Add the suffix R to device

type (e.g., TL750M05CKTER). Chip forms are tested at 25

°

C.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

Copyright 

©

 2000, Texas Instruments Incorporated

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

background image

TL750M, TL751M SERIES

LOW-DROPOUT VOLTAGE REGULATORS

SLVS021H – JANUARY 1988 – REVISED JANUARY 2000

2

POST OFFICE BOX 655303 

 DALLAS, TEXAS 75265

TL750M . . . KC  PACKAGE†

(TOP VIEW)

TO-220AB

O

C

I

OUTPUT

COMMON

INPUT

TL750M . . . KTE PACKAGE†

(TOP VIEW)

OUTPUT

COMMON

INPUT

O

C

I

TL750M . . . KTP PACKAGE†

(TOP VIEW)

OUTPUT

COMMON

INPUT

COMMON

O

C

I

TL751M . . . KTG PACKAGE†

(TOP VIEW)

NC

OUTPUT

COMMON

INPUT

ENABLE

O

C

I

N

E

† The common terminal is in electrical contact with the mounting base.

NC – No internal connection

TL751Mxx functional block diagram

DEVICE

COMPONENT

COUNT

Transistors

46

Diodes

14

Resistors

44

Capacitors

4

JFETs

1

Tunnels

(emitter R)

2

Enable

Bandgap

Current

Limiting

_

+

Overvoltage/

Thermal

Shutdown

ENABLE

OUTPUT

COMMON

INPUT

28 V

background image

TL750M, TL751M SERIES

LOW-DROPOUT VOLTAGE REGULATORS

SLVS021H – JANUARY 1988 – REVISED JANUARY 2000

3

POST OFFICE BOX 655303 

 DALLAS, TEXAS 75265

absolute maximum ratings over virtual junction temperature range (unless otherwise noted)

Continuous input voltage 

26 V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

Transient input voltage (see Figure 3) 

60 V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

Continuous reverse input voltage 

–15 V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

Transient reverse input voltage: t = 100 ms 

–50 V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

Package thermal impedance, 

θ

JA

 (see Notes 1 and 2): KC package 

22

°

C/W

. . . . . . . . . . . . . . . . . . . . . . . . . . . 

KTE package 

23

°

C/W

. . . . . . . . . . . . . . . . . . . . . . . . . 

KTG package 

23

°

C/W

. . . . . . . . . . . . . . . . . . . . . . . . . 

KTP package 

28

°

C/W

. . . . . . . . . . . . . . . . . . . . . . . . . 

Virtual junction temperature range, T

J

 

0

°

C to 150

°

C

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 

260

°

C

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

Storage temperature range, T

stg

 –65

°

C to 150

°

C

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and

functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not

implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES:

1. Maximum power dissipation is a function of TJ(max),

 

θ

JA, and TA. The maximum allowable power dissipation at any allowable

ambient temperature is PD = (TJ(max) – TA)/

θ

JA. Operating at the absolute maximum TJ of 150

°

C can impact reliability. Due to

variation in individual device electrical characteristics and thermal resistance, the built-in thermal overload protection may be

activated at power levels slightly above or below the rated dissipation.

2. The package thermal impedance is calculated in accordance with JESD 51.

recommended operating conditions

MIN

MAX

UNIT

TL75xM05

6

26

Input voltage range VI

TL75xM08

9

26

V

Input voltage range, VI

TL75xM10

11

26

V

TL75xM12

13

26

High-level ENABLE input voltage, VIH

TL751Mxx

2

15

V

Low-level ENABLE input voltage, VIL

TL751Mxx

0

0.8

V

Output current range, IO

TL75xMxxC

750

mA

Operating virtual junction temperature range, TJ

TL75xMxxC

0

125

°

C

electrical characteristics, V

= 14 V, I

O

 = 300 mA, T

J

 = 25

°

C

PARAMETER

TL751MXXX

UNIT

PARAMETER

MIN

TYP

MAX

UNIT

Response time, ENABLE to output

50

µ

s

background image

TL750M, TL751M SERIES

LOW-DROPOUT VOLTAGE REGULATORS

SLVS021H – JANUARY 1988 – REVISED JANUARY 2000

4

POST OFFICE BOX 655303 

 DALLAS, TEXAS 75265

electrical characteristics, V

= 14 V, I

O

 = 300 mA, ENABLE at 0 V for TL751M05, T

J

 = 25

°

C (unless

otherwise noted) (see Note 3)

PARAMETER

TEST CONDITIONS

TL750M05C

TL751M05C

UNIT

MIN

TYP

MAX

Output voltage

4.95

5

5.05

V

Output voltage

TJ =  0

°

C to 125

°

C

4.9

5.1

V

Input voltage regulation

VI = 9 V to 16 V,

IO = 250 mA

10

25

mV

Input voltage regulation

VI = 6 V to 26 V,

IO = 250 mA

12

50

mV

Ripple rejection

VI = 8 V to 18 V,

f = 120 Hz

50

55

dB

Output voltage regulation

IO = 5 mA to 750 mA

20

50

mV

Dropout voltage

IO = 500 mA

0.5

V

Dropout voltage

IO = 750 mA

0.6

V

Output noise voltage

f = 10 Hz to 100 kHz

500

µ

V

Bias current

IO = 750 mA

60

75

mA

Bias current

IO = 10 mA

5

mA

Bias current (TL751M05C and TL751M05Q only)

ENABLE VIH 

2 V

200

µ

A

NOTE 3: Pulse-testing techniques maintain the junction temperature as close to the ambient temperature as possible. Thermal effects must be

taken into account separately. All characteristics are measured with a 0.1-

µ

F capacitor across the input and a 10-

µ

F tantalum capacitor

on the output, with equivalent series resistance within the guidelines shown in Figure 3.

electrical characteristics, V

I

 = 14 V, I

O

 = 300 mA, ENABLE at 0 V for TL751M08, T

J

 = 25

°

C (unless

otherwise noted) (see Note 3)

PARAMETER

TEST CONDITIONS

TL750M08C

TL751M08C

UNIT

MIN

TYP

MAX

Output voltage

7.92

8

8.08

V

Output voltage

TJ = 0

°

C to 125

°

C

7.84

8.16

V

Input voltage regulation

VI = 10 V to 17 V,

IO = 250 mA

12

40

mV

Input voltage regulation

VI = 9 V to 26 V,

IO = 250 mA

15

68

mV

Ripple rejection

VI = 11 V to 21 V,

f = 120 Hz

50

55

dB

Output voltage regulation

IO = 5 mA to 750 mA

24

80

mV

Dropout voltage

IO = 500 mA

0.5

V

Dropout voltage

IO = 750 mA

0.6

V

Output noise voltage

f = 10 Hz to 100 kHz

500

µ

V

Bias current

IO = 750 mA

60

75

mA

Bias current

IO = 10 mA

5

mA

Bias current (TL751Mxx only)

ENABLE VIH 

2 V

200

µ

A

NOTE 3: Pulse-testing techniques maintain the junction temperature as close to the ambient temperature as possible. Thermal effects must be

taken into account separately. All characteristics are measured with a 0.1-

µ

F capacitor across the input and a 10-

µ

F tantalum capacitor

on the output, with equivalent series resistance within the guidelines shown in Figure 3.

background image

TL750M, TL751M SERIES

LOW-DROPOUT VOLTAGE REGULATORS

SLVS021H – JANUARY 1988 – REVISED JANUARY 2000

5

POST OFFICE BOX 655303 

 DALLAS, TEXAS 75265

electrical characteristics, V

I

 = 14 V, I

O

 = 300 mA, ENABLE at 0 V for TL751M10, T

J

 = 25

°

C (unless

otherwise noted) (see Note 3)

PARAMETER

TEST CONDITIONS

TL750M10C

TL751M10C

UNIT

MIN

TYP

MAX

Output voltage

9.9

10

10.1

V

Output voltage

TJ = 0

°

C to 125

°

C

9.8

10.2

V

Input voltage regulation

VI = 12 V to 18 V,

IO = 250 mA

15

43

mV

Input voltage regulation

VI = 11 V to 26 V,

IO = 250 mA

20

75

mV

Ripple rejection

VI = 13 V to 23 V,

f = 120 Hz

50

55

dB

Output voltage regulation

IO = 5 mA to 750 mA

30

100

mV

Dropout voltage

IO = 500 mA

0.5

V

Dropout voltage

IO = 750 mA

0.6

V

Output noise voltage

f = 10 Hz to 100 kHz

1000

µ

V

Bias current

IO = 750 mA

60

75

mA

Bias current

IO = 10 mA

5

mA

Bias current (TL751Mxx only)

ENABLE VIH 

2 V

200

µ

A

NOTE 3: Pulse-testing techniques maintain the junction temperature as close to the ambient temperature as possible. Thermal effects must be

taken into account separately. All characteristics are measured with a 0.1-

µ

F capacitor across the input and a 10-

µ

F tantalum capacitor

on the output, with equivalent series resistance within the guidelines shown in Figure 3.

electrical characteristics, V

I

 = 14 V, I

O

 = 300 mA, ENABLE at 0 V for TL751M12, T

J

 = 25

°

C (unless

otherwise noted) (see Note 3)

PARAMETER

TEST CONDITIONS

TL750M12C

TL751M12C

UNIT

MIN

TYP

MAX

Output voltage

11.88

12

12.12

V

Output voltage

TJ = 0

°

C to 125

°

C

11.76

12.24

V

Input voltage regulation

VI = 14 V to 19 V,

IO = 250 mA

15

43

mV

Input voltage regulation

VI = 13 V to 26 V,

IO = 250 mA

20

78

mV

Ripple rejection

VI = 13 V to 23 V,

f = 120 Hz

50

55

dB

Output voltage regulation

IO = 5 mA to 750 mA

30

120

mV

Dropout voltage

IO = 500 mA

0.5

V

Dropout voltage

IO = 750 mA

0.6

V

Output noise voltage

f = 10 Hz to 100 kHz

1000

µ

V

Bias current

IO = 750 mA

60

75

mA

Bias current

IO = 10 mA

5

mA

Bias current (TL751Mxx only)

ENABLE VIH 

2 V

200

µ

A

NOTE 3: Pulse-testing techniques maintain the junction temperature as close to the ambient temperature as possible. Thermal effects must be

taken into account separately. All characteristics are measured with a 0.1-

µ

F capacitor across the input and a 10-

µ

F tantalum capacitor

on the output, with equivalent series resistance within the guidelines shown in Figure 3.

background image

TL750M, TL751M SERIES

LOW-DROPOUT VOLTAGE REGULATORS

SLVS021H – JANUARY 1988 – REVISED JANUARY 2000

6

POST OFFICE BOX 655303 

 DALLAS, TEXAS 75265

electrical characteristics, V

= 14 V, I

O

 = 300 mA, ENABLE at 0 V, T

J

 = 25

°

C (unless otherwise noted)

(see Note 3)

PARAMETER

TEST CONDITIONS

TL750M05Y

UNIT

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Output voltage

5

V

Input voltage regulation

VI = 9 V to 16 V,

IO = 250 mA

10

mV

Input voltage regulation

VI = 6 V to 26 V,

IO = 250 mA

12

mV

Ripple rejection

VI = 8 V to 18 V,

f = 120 Hz

55

dB

Output voltage regulation

IO = 5 mA to 750 mA

20

mV

Output noise voltage

f = 10 Hz to 100 kHz

500

µ

V

Bias current

IO = 750 mA

60

mA

NOTE 3: Pulse-testing techniques maintain the junction temperature as close to the ambient temperature as possible. Thermal effects must be

taken into account separately. All characteristics are measured with a 0.1-

µ

F capacitor across the input and a 10-

µ

F tantalum capacitor

on the output, with equivalent series resistance within the guidelines shown in Figure 3.

electrical characteristics, V

I

 = 14 V, I

O

 = 300 mA, ENABLE at 0 V, T

J

 = 25

°

C (unless otherwise noted)

(see Note 3)

PARAMETER

TEST CONDITIONS

TL750M08Y

UNIT

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Output voltage

8

V

Input voltage regulation

VI = 10 V to 17 V,

IO = 250 mA

12

mV

Input voltage regulation

VI = 9 V to 26 V,

IO = 250 mA

15

mV

Ripple rejection

VI = 11 V to 21 V,

f = 120 Hz

55

dB

Output voltage regulation

IO = 5 mA to 750 mA

24

mV

Output noise voltage

f = 10 Hz to 100 kHz

500

µ

V

Bias current

IO = 750 mA

60

mA

NOTE 3: Pulse-testing techniques maintain the junction temperature as close to the ambient temperature as possible. Thermal effects must be

taken into account separately. All characteristics are measured with a 0.1-

µ

F capacitor across the input and a 10-

µ

F tantalum capacitor

on the output, with equivalent series resistance within the guidelines shown in Figure 3.

electrical characteristics, V

I

 = 14 V, I

O

 = 300 mA, ENABLE at 0 V, T

J

 = 25

°

C (unless otherwise noted)

(see Note 3)

PARAMETER

TEST CONDITIONS

TL750M10Y

UNIT

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Output voltage

10

V

Input voltage regulation

VI = 12 V to 18 V,

IO = 250 mA

15

mV

Input voltage regulation

VI = 11 V to 26 V,

IO = 250 mA

20

mV

Ripple rejection

VI = 13 V to 23 V,

f = 120 Hz

55

dB

Output voltage regulation

IO = 5 mA to 750 mA

30

mV

Output noise voltage

f = 10 Hz to 100 kHz

1000

µ

V

Bias current

IO = 750 mA

60

mA

NOTE 3: Pulse-testing techniques maintain the junction temperature as close to the ambient temperature as possible. Thermal effects must be

taken into account separately. All characteristics are measured with a 0.1-

µ

F capacitor across the input and a 10-

µ

F tantalum capacitor

on the output, with equivalent series resistance within the guidelines shown in Figure 3.

background image

TL750M, TL751M SERIES

LOW-DROPOUT VOLTAGE REGULATORS

SLVS021H – JANUARY 1988 – REVISED JANUARY 2000

7

POST OFFICE BOX 655303 

 DALLAS, TEXAS 75265

TL751M12Y electrical characteristics, V

I

 = 14 V, I

O

 = 300 mA, ENABLE at 0 V, T

J

 = 25

°

C (unless

otherwise noted) (see Note 3)

PARAMETER

TEST CONDITIONS

TL750M12Y

UNIT

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Output voltage

12

V

Input voltage regulation

VI = 14 V to 19 V,

IO = 250 mA

15

mV

Input voltage regulation

VI = 13 V to 26 V,

IO = 250 mA

20

mV

Ripple rejection

VI = 13 V to 23 V,

f = 120 Hz

55

dB

Output voltage regulation

IO = 5 mA to 750 mA

30

mV

Output noise voltage

f = 10 Hz to 100 kHz

1000

µ

V

Bias current

IO = 750 mA

60

mA

NOTE 3: Pulse-testing techniques maintain the junction temperature as close to the ambient temperature as possible. Thermal effects must be

taken into account separately. All characteristics are measured with a 0.1-

µ

F capacitor across the input and a 10-

µ

F tantalum capacitor

on the output, with equivalent series resistance within the guidelines shown in Figure 3.

PARAMETER MEASUREMENT INFORMATION

The TL751Mxx is a low-dropout regulator. This means that the capacitance loading is important to the performance

of the regulator because it is a vital part of the control loop. The capacitor value and the equivalent series resistance

(ESR) both affect the control loop and must be defined for the load range and the temperature range. Figures 1 and 2

can establish the capacitance value and ESR range for the best regulator performance.

Figure 1 shows the recommended range of ESR for a given load with a 10-

µ

F capacitor on the output. This figure

also shows a maximum ESR limit of 2 

 and a load-dependent minimum ESR limit.

For applications with varying loads, the lightest load condition should be chosen because it is the worst case. Figure 2

shows the relationship of the reciprocal of ESR to the square root of the capacitance with a minimum capacitance

limit of 10 

µ

F and a maximum ESR limit of 2 

. This figure establishes the amount that the minimum ESR limit shown

in Figure 1 can be adjusted for different capacitor values. For example, where the minimum load needed is 200 mA,

Figure 2 suggests an ESR range of 0.8 

 to 2

 Ω

 for 10 

µ

F. Figure 2 shows that changing the capacitor from 10 

µ

F

to 400 

µ

F can change the ESR minimum by greater than 3/0.5 (or 6). Therefore, the new minimum ESR value is 0.8/6

(or 0.13 

 ). This allows an ESR range of 0.13 

 to 2 

 , achieving an expanded ESR range by using a larger capacitor

at the output. For better stability in low-current applications, a small resistance placed in series with the capacitor (see

Table 1) is recommended, so that ESRs better approximate those shown in Figures 1 and 2.

background image

TL750M, TL751M SERIES

LOW-DROPOUT VOLTAGE REGULATORS

SLVS021H – JANUARY 1988 – REVISED JANUARY 2000

8

POST OFFICE BOX 655303 

 DALLAS, TEXAS 75265

PARAMETER MEASUREMENT INFORMATION

Table 1. Compensation for Increased Stability at Low Currents

MANUFACTURER

CAPACITANCE

ESR

TYP

PART NUMBER

ADDITIONAL

RESISTANCE

AVX

15 

µ

F

0.9 

TAJB156M010S

KEMET

33 

µ

F

0.6 

T491D336M010AS

0.5 

ÏÏÏÏÏÏÏÏÏÏÏÏÏ

ÏÏÏÏÏÏÏÏÏÏÏÏÏ

ÏÏÏÏÏÏÏÏÏÏÏÏÏ

ÏÏÏÏÏÏÏÏÏÏÏÏÏ

ÏÏÏÏÏÏÏÏÏÏÏÏÏ

ÏÏÏÏÏÏÏÏÏÏÏÏÏ

ÏÏÏÏÏÏÏÏÏÏÏÏÏ

ÏÏÏÏÏÏÏÏÏÏÏÏÏ

ÏÏÏÏÏÏÏÏÏÏÏÏÏ

ÏÏÏÏÏÏÏÏÏÏÏÏÏ

0

1

2

3

4

5

4.5

3.5

2.5

1.5

0.5

0

0.01

0.015

0.02

0.025

0.03

0.035

0.04

ÎÎÎ

200 

µ

F

ÎÎÎ

1000 

µ

F

1/ESR

0.005

ÎÎÎ

400 

µ

F

Not Recommended

Recommended Min ESR

Potential Instability

Region of

Best Stability

ÎÎÎ

ÎÎÎ

100 

µ

F

ÎÎÎ

ÎÎÎ

22 

µ

F

ÎÎÎ

ÎÎÎ

10 

µ

F

ÏÏ

STABILITY

vs

EQUIVALENT SERIES RESISTANCE (ESR)

C

L

ÑÑÑÑÑÑÑÑÑÑÑÑÑÑ

ÑÑÑÑÑÑÑÑÑÑÑÑÑÑ

ÑÑÑÑÑÑÑÑÑÑÑÑÑÑ

ÑÑÑÑÑÑÑÑÑÑÑÑÑÑ

ÑÑÑÑÑÑÑÑÑÑÑÑÑÑ

ÑÑÑÑÑÑÑÑÑÑÑÑÑÑ

ÑÑÑÑÑÑÑÑÑÑÑÑÑÑ

ÑÑÑÑÑÑÑÑÑÑÑÑÑÑ

ÑÑÑÑÑÑÑÑÑÑÑÑÑÑ

ÎÎÎÎÎÎÎ

ÎÎÎÎÎÎÎ

Max ESR Boundary

ÎÎÎÎÎÎÎÎ

ÎÎÎÎÎÎÎÎ

Region of Best Stability

ÎÎÎÎ

Min ESR

ÎÎÎÎ

ÎÎÎÎ

Boundary

3

2.8

2.6

2.4

2.2

2

1.8

1.6

1.4

1.2

1

0.8

0.6

0.4

0.2

0

0.1

0

0.2

0.3

0.4

0.5

IL – Load Current Range – A

This Region Not

Recommended for

Operation

CL = 10 

µ

F

CI = 0.1 

µ

F

f = 120 Hz

OUTPUT CAPACITOR

EQUIVALENT SERIES RESISTANCE (ESR)

vs

LOAD CURRENT RANGE

ÎÎÎÎÎÎÎÎÎ

Potential Instability Region

Applied Load

Current

Load

Voltage

VL

IL

VL = 

IL 

×

 ESR

Equivalent Series Resistance (ESR) –

Stability –

Figure 1

Figure 2

background image

TL750M, TL751M SERIES

LOW-DROPOUT VOLTAGE REGULATORS

SLVS021H – JANUARY 1988 – REVISED JANUARY 2000

9

POST OFFICE BOX 655303 

 DALLAS, TEXAS 75265

TYPICAL CHARACTERISTICS

Table of Graphs

FIGURE

Transient input voltage vs Time

3

Output voltage vs Input voltage

4

Input current vs Input voltage

IO = 10 mA

5

Input current vs Input voltage

IO = 100 mA

6

Dropout voltage vs Output current

7

Quiescent current vs Output current

8

Load transient response

9

Line transient response

10

Figure 3

30

20

0

100

200

40

TRANSIENT INPUT VOLTAGE

vs

TIME

60

300

400

500

600

I

V  – T

ransient 

Input 

V

oltage – V 

0

10

50

TJ = 25

°

C

VI = 14 V + 46e(–t/0.230) 

for t 

5 ms

t – Time – ms

tr = 1 ms

Figure 4

8

4

2

0

0

2

4

6

8

10

– Output V

oltage – V

12

14

OUTPUT VOLTAGE

vs

INPUT VOLTAGE

12

14

10

6

V

O

VI – Input Voltage – V

IO = 10 mA

TJ = 25

°

C

TL75xM12

TL75xM10

TL75xM08

TL75xM05

background image

TL750M, TL751M SERIES

LOW-DROPOUT VOLTAGE REGULATORS

SLVS021H – JANUARY 1988 – REVISED JANUARY 2000

10

POST OFFICE BOX 655303 

 DALLAS, TEXAS 75265

TYPICAL CHARACTERISTICS

Figure 5

80

40

20

0

0

2

4

6

8

10

120

140

12

14

100

60

180

200

160

– Input Current – mA

I

I

VI – Input Voltage – V

IO = 10 mA

TJ = 25

°

C

INPUT CURRENT

vs

INPUT VOLTAGE

TL75_M05

TL75_M08

TL75_M10

TL75_M12

Figure 6

200

100

50

0

0

2

4

6

8

10

300

350

12

14

250

150

VI – Input Voltage – V

IO = 100 mA

TJ = 25

°

C

INPUT CURRENT

vs

INPUT VOLTAGE

– Input Current – mA

I

I

TL75_M05

TL75_M08

TL75_M10

TL75_M12

Figure 7

200

150

125

100

0

50

100

150

200

250

250

300

225

175

75

50

IO – Output Current – mA

TJ = 25

°

C

DROPOUT VOLTAGE

vs

OUTPUT CURRENT

Dropout V

oltage – mV

Figure 8

12

8

6

4

0

20

40

60

80

100

150

10

2

0

IO – Output Current – mA

TJ = 25

°

C

VI = 14 V

QUIESCENT CURRENT

vs

OUTPUT CURRENT

– Quiescent Current – mA

250

350

I

Q

background image

TL750M, TL751M SERIES

LOW-DROPOUT VOLTAGE REGULATORS

SLVS021H – JANUARY 1988 – REVISED JANUARY 2000

11

POST OFFICE BOX 655303 

 DALLAS, TEXAS 75265

TYPICAL CHARACTERISTICS

Figure 9

200

0

– 100

– 200

0

50

100

150

200

250

100

150

100

t – Time –

 µ

s

LOAD TRANSIENT RESPONSE

– Output Current – mA

300

350

I

O

50

0

VI(NOM) = VO + 1 V

ESR = 2

CL = 10 

µ

F

TJ = 25

°

C

– Output V

oltage 

– 

mV

V

O

Figure 10

0

20

40

60

80

100

150

LINE TRANSIENT RESPONSE

250

350

– Output V

oltage 

– 

mV

V

O

20 mV/DIV

1 V/DIV

– Input V

oltage – V

V

IN

t – Time –

 µ

s

VI(NOM) = VO + 1 V

ESR = 2

IL = 20 mA

CL = 10 

µ

F

TJ = 25

°

C

background image

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