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SN54HCT139, SN74HCT139

DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS

 

 

SCLS066B – MARCH 1982 – REVISED MAY 1997

1

POST OFFICE BOX 655303 

 DALLAS, TEXAS 75265

D

Inputs Are TTL-Voltage Compatible

D

Designed Specifically for High-Speed

Memory Decoders and Data Transmission

Systems

D

Incorporate Two Enable Inputs to Simplify

Cascading and/or Data Reception

D

Package Options Include Plastic

Small-Outline (D), Shrink Small-Outline

(DB), Thin Shrink Small-Outline (PW), and

Ceramic Flat (W) Packages, Ceramic Chip

Carriers (FK), and Standard Plastic (N) and

Ceramic (J) 300-mil DIPs

description

The ’HCT139 are designed for high-performance

memory-decoding or data-routing applications

requiring very short propagation delay times. In

high-performance memory systems, these

decoders can minimize the effects of system

decoding. When employed with high-speed

memories utilizing a fast enable circuit, the delay

time of these decoders and the enable time of the

memory are usually less than the typical access

time of the memory. This means that the effective

system delay introduced by the decoders is

negligible.

The ’HCT139 comprise two individual 2-line to

4-line decoders in a single package. The

active-low enable (G) input can be used as a data

line in demultiplexing applications. These

decoders/demultiplexers feature fully buffered

inputs, each of which represents only one

normalized load to its driving circuit.

The SN54HCT139 is characterized for operation over the full military temperature range of –55

°

C to 125

°

C. The

SN74HCT139 is characterized for operation from –40

°

C to 85

°

C.

FUNCTION TABLE

INPUTS

OUTPUTS

G

SELECT

OUTPUTS

G

B

A

Y0

Y1

Y2

Y3

H

X

X

H

H

H

H

L

L

L

L

H

H

H

L

L

H

H

L

H

H

L

H

L

H

H

L

H

L

H

H

H

H

H

L

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

3

2 1 20 19

9 10 11 12 13

4

5

6

7

8

18

17

16

15

14

2A

2B

NC

2Y0

2Y1

1B

1Y0

NC

1Y1

1Y2

1A

1G

NC

2Y3

2Y2

V

2G

1Y3

GND

NC

SN54HCT139 . . . FK PACKAGE

(TOP VIEW)

CC

NC – No internal connection

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

1G

1A

1B

1Y0

1Y1

1Y2

1Y3

GND

V

CC

2G

2A

2B

2Y0

2Y1

2Y2

2Y3

SN54HCT139 . . . J  OR  W  PACKAGE

SN74HCT139 . . . D, DB, N, OR PW PACKAGE

(TOP VIEW)

 

Copyright 

©

 1997, Texas Instruments Incorporated

UNLESS OTHERWISE NOTED this document contains PRODUCTION

DATA information current as of publication date. Products conform to

specifications per the terms of Texas Instruments standard warranty.

Production processing does not necessarily include testing of all

parameters.

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SN54HCT139, SN74HCT139

DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS

 

 

SCLS066B – MARCH 1982 – REVISED MAY 1997

2

POST OFFICE BOX 655303 

 DALLAS, TEXAS 75265

logic symbols (alternatives)

1

2

1A

1Y0

4

0

2

3

1B

EN

1

1Y1

5

1

1Y2

6

2

1Y3

7

3

2Y0

12

2Y1

11

2Y2

10

2Y3

9

X/Y

14

13

15

2A

2B

2G

1G

0

2

1A

1Y0

4

0

1

3

1B

1

1Y1

5

1

1Y2

6

2

1Y3

7

3

2Y0

12

2Y1

11

2Y2

10

2Y3

9

DMUX

14

13

15

2A

2B

2G

1G

G

0

3

† These symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.

Pin numbers shown are for the D, DB, J, N, PW, and W packages.

logic diagram (positive logic)

1G

1Y0

1Y1

1Y2

1Y3

2Y0

2Y1

2Y2

2Y3

1A

1B

2G

2A

2B

Pin numbers shown are for the D, DB, J, N, PW, and W packages.

1

2

3

15

14

13

4

5

6

7

12

11

10

9

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SN54HCT139, SN74HCT139

DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS

 

 

SCLS066B – MARCH 1982 – REVISED MAY 1997

3

POST OFFICE BOX 655303 

 DALLAS, TEXAS 75265

absolute maximum ratings over operating free-air temperature range

Supply voltage range, V

CC

 

–0.5 V to 7 V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

Input clamp current, I

IK

 (V

I

 < 0 or V

I

 > V

CC

) (see Note 1) 

±

20 mA

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

Output clamp current, I

OK

 (V

O

 < 0 or V

O

 > V

CC

) (see Note 1) 

±

20 mA

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

Continuous output current, I

O

 (V

O

 = 0 to V

CC

±

25 mA

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

Continuous current through V

CC

 or GND 

±

50 mA

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

Package thermal impedance, 

θ

JA 

(see Note 2): D package 

113

°

C/W

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

DB package 

131

°

C/W

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

N package 

78

°

C/W

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

PW package 

149

°

C/W

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

Storage temperature range, T

stg

 –65

°

C to 150

°

C

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and

functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not

implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES:

1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

2. The package thermal impedance is calculated in accordance with JESD 51, except for through-hole packages, which use a trace

length of zero.

recommended operating conditions

SN54HCT139

SN74HCT139

UNIT

MIN

NOM

MAX

MIN

NOM

MAX

UNIT

VCC

Supply voltage

4.5

5

5.5

4.5

5

5.5

V

VIH

High-level input voltage

VCC = 4.5 V to 5.5 V

2

2

V

VIL

Low-level input voltage

VCC = 4.5 V to 5.5 V

0

0.8

0

0.8

V

VI

Input voltage

0

VCC

0

VCC

V

VO

Output voltage

0

VCC

0

VCC

V

tt

Input transition (rise and fall) time

0

500

0

500

ns

TA

Operating free-air temperature

–55

125

–40

85

°

C

electrical characteristics over recommended operating free-air temperature range (unless

otherwise noted)

PARAMETER

TEST CONDITIONS

VCC

TA = 25

°

C

SN54HCT139

SN74HCT139

UNIT

PARAMETER

TEST CONDITIONS

VCC

MIN

TYP

MAX

MIN

MAX

MIN

MAX

UNIT

VOH

VI = VIH or VIL

IOH = –20 

µ

A

4 5 V

4.4

4.499

4.4

4.4

V

VOH

VI = VIH or VIL

IOH = –4 mA

4.5 V

3.98

4.3

3.7

3.84

V

VOL

VI = VIH or VIL

IOL = 20 

µ

A

4 5 V

0.001

0.1

0.1

0.1

V

VOL

VI = VIH or VIL

IOL = 4 mA

4.5 V

0.17

0.26

0.4

0.33

V

II

VI = VCC or 0

5.5 V

±

0.1

±

100

±

1000

±

1000

nA

ICC

VI = VCC or 0,

IO = 0

5.5 V

8

160

80

µ

A

ICC‡

One input at 0.5 V or 2.4 V,

Other inputs at 0 or VCC

5.5 V

1.4

2.4

3

2.9

mA

Ci

4.5 V

to 5.5 V

3

10

10

10

pF

‡ This is the increase in supply current for each input that is at one of the specified TTL voltage levels rather than 0 V or VCC.

PRODUCT PREVIEW information concerns products in the formative or

design phase of development. Characteristic data and other

specifications are design goals. Texas Instruments reserves the right to

change or discontinue these products without notice.

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SN54HCT139, SN74HCT139

DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS

 

 

SCLS066B – MARCH 1982 – REVISED MAY 1997

4

POST OFFICE BOX 655303 

 DALLAS, TEXAS 75265

switching characteristics over recommended operating free-air temperature range, C

L

 = 50 pF

(unless otherwise noted) (see Figure 1)

PARAMETER

FROM

TO

VCC

TA = 25

°

C

SN54HCT139

SN74HCT139

UNIT

PARAMETER

(INPUT)

(OUTPUT)

VCC

MIN

TYP

MAX

MIN

MAX

MIN

MAX

UNIT

A or B

Y

4.5 V

14

34

51

43

t d

A or B

Y

5.5 V

12

30

50

40

ns

tpd

G

Y

4.5 V

11

34

51

43

ns

G

Y

5.5 V

10

30

50

40

tt

Y

4.5 V

8

15

22

19

ns

tt

Y

5.5 V

6

14

21

17

ns

operating characteristics, T

A

 = 25

°

C

PARAMETER

TEST CONDITIONS

TYP

UNIT

Cpd

Power dissipation capacitance per decoder

No load

25

pF

PARAMETER MEASUREMENT INFORMATION

VOLTAGE WAVEFORM

INPUT RISE AND FALL TIMES

1.3 V

1.3 V

0.3 V

0.3 V

2.7 V

2.7 V

3 V

0 V

tr

tf

Input

VOLTAGE WAVEFORMS

PROPAGATION DELAY AND OUTPUT RISE AND FALL TIMES

1.3 V

1.3 V

1.3 V

10%

10%

90%

90%

3 V

VOH

VOL

0 V

tr

tf

Input

In-Phase

Output

1.3 V

tPLH

tPHL

1.3 V

1.3 V

10%

10%

90%

90%

VOH

VOL

tr

tf

tPHL

tPLH

Out-of-Phase

Output

Test

Point

From Output

Under Test

LOAD CIRCUIT

NOTES: A. CL includes probe and test-fixture capacitance.

B. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following

characteristics: PRR 

 1 MHz, ZO = 50 

, tr = 6 ns, tf = 6 ns.

C. The outputs are measured one at a time with one input transition per measurement.

D. tPLH and tPHL are the same as tpd.

CL = 50 pF

(see Note A)

Figure 1. Load Circuit and Voltage Waveforms

PRODUCT PREVIEW information concerns products in the formative or

design phase of development. Characteristic data and other

specifications are design goals. Texas Instruments reserves the right to

change or discontinue these products without notice.

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Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue

any product or service without notice, and advise customers to obtain the latest version of relevant information

to verify, before placing orders, that information being relied on is current and complete. All products are sold

subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those

pertaining to warranty, patent infringement, and limitation of liability.

TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in

accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent

TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily

performed, except those mandated by government requirements.

CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF

DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL

APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR

WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER

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BE FULLY AT THE CUSTOMER’S RISK.

In order to minimize risks associated with the customer’s applications, adequate design and operating

safeguards must be provided by the customer to minimize inherent or procedural hazards.

TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent

that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other

intellectual property right of TI covering or relating to any combination, machine, or process in which such

semiconductor products or services might be or are used. TI’s publication of information regarding any third

party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.

Copyright 

©

 1998, Texas Instruments Incorporated