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AM26C32C, AM26C32I, AM26C32M

QUADRUPLE DIFFERENTIAL LINE RECEIVERS

 

 

SLLS104F – DECEMBER 1990 – REVISED APRIL 1998

1

POST OFFICE BOX 655303 

 DALLAS, TEXAS 75265

D

Meet or Exceed the Requirements of ANSI

EIA / TIA-422-B, EIA / TIA-423-B, and ITU

Recommendation V.10 and V.11

D

Low Power, I

CC

 = 10 mA

 

Typ

D

±

7-V Common-Mode Range With 

±

200-mV

Sensitivity

D

Input  Hysteresis . . . 60  mV  Typ

D

t

pd

 = 17 ns Typ

D

Operate From a Single 5-V Supply

D

3-State Outputs

D

Input Fail-Safe Circuitry

D

Improved Replacements for AM26LS32

description

The AM26C32C, AM26C32I, and AM26C32M are

quadruple differential line receivers for balanced

or unbalanced digital data transmission. The

enable function is common to all four receivers

and offers a choice of active-high or active-low

input. The 3-state outputs permit connection

directly to a bus-organized system. Fail-safe

design specifies that if the inputs are open, the

outputs are always high.

The AM26C32 is manufactured using a BiCMOS

process, which is a combination of bipolar and

CMOS transistors. This process provides the high

voltage and current of bipolar with the low power

of CMOS to reduce the power consumption to

about one-fifth that of the standard AM26LS32

while maintaining ac and dc performance.

The AM26C32C is characterized for operation from 0

°

C to 70

°

C. The AM26C32I is characterized for operation

from – 40

°

C to 85

°

C. The AM26C32M is characterized for operation from – 55

°

C to 125

°

C.

Copyright 

©

 1998, Texas Instruments Incorporated

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

 

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

1

2

3

5

6

7

8

16

15

14

13

12

11

10

9

1B

1A

1Y

G

2Y

2A

2B

GND

V

CC

4B

4A

4Y

G

3Y

3A

3B

AM26C32C, AM26C32I . . .   D  OR  N  PACKAGE

AM26C32M . . . J  OR  W  PACKAGE

(TOP VIEW)

3

2

1 20 19

9 10 11 12 13

4

5

6

7

8

18

17

16

15

14

4A

4Y

NC

G

3Y

1Y

G

NC

2Y

2A

FK PACKAGE

(TOP VIEW)

1A

1B

NC

3B

3A

4B

2B

GND

NC

NC – No internal connection

CC

V

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AM26C32C, AM26C32I, AM26C32M

QUADRUPLE DIFFERENTIAL LINE RECEIVERS

 

 

SLLS104F – DECEMBER 1990 – REVISED APRIL 1998

2

POST OFFICE BOX 655303 

 DALLAS, TEXAS 75265

FUNCTION TABLE

(each receiver)

DIFFERENTIAL

ENABLES

OUTPUT

INPUT

G

G

OUTPUT

VID

VIT

H

X

H

VID 

 VIT+

X

L

H

VIT < VID < VIT

H

X

?

VIT– < VID < VIT+

X

L

?

VID

VIT

H

X

L

VID 

  VIT–

X

L

L

X

L

H

Z

H = high level, L = low level, X = irrelevant

Z = high impedance (off), ? = indeterminate

logic symbol

4Y

3Y

2Y

1Y

13

11

5

3

4B

4A

3B

3A

2B

2A

1B

1A

G

G

15

14

9

10

7

6

1

2

12

4

EN

1

† This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.

Pin numbers shown are for the D, J, N, and W packages.

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AM26C32C, AM26C32I, AM26C32M

QUADRUPLE DIFFERENTIAL LINE RECEIVERS

 

 

SLLS104F – DECEMBER 1990 – REVISED APRIL 1998

3

POST OFFICE BOX 655303 

 DALLAS, TEXAS 75265

logic diagram (positive logic)

4Y

3Y

2Y

1Y

13

11

5

3

4B

4A

3B

3A

2B

2A

1B

1A

G

G

15

14

9

10

7

6

1

2

12

4

Pin numbers shown are for the D, J, N, and W packages.

schematics

Input

VCC

EQUIVALENT OF A OR B INPUT

TYPICAL OF ALL OUTPUTS

Output

VCC

VCC

1.7 k

NOM

GND

GND

1.7 k

NOM

17 k

NOM

288 k

NOM

VCC(A)

or

GND(B)

Input

GND

EQUIVALENT OF G OR G INPUT

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AM26C32C, AM26C32I, AM26C32M

QUADRUPLE DIFFERENTIAL LINE RECEIVERS

 

 

SLLS104F – DECEMBER 1990 – REVISED APRIL 1998

4

POST OFFICE BOX 655303 

 DALLAS, TEXAS 75265

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

Supply voltage, V

CC

 (see Note 1) 

7 V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

Input voltage range, V

I

: A or B inputs 

– 11 V to 14 V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

G or G inputs 

– 0.5 V to V

CC

 + 0.5 V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

Differential input voltage range, V

ID

 

– 14 V to 14 V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

Output voltage range, V

O

 

– 0.5 V to V

CC

 + 0.5 V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

Output current, I

O

 

±

25 mA

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

Continuous total power dissipation 

See Dissipation Rating Table

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

Storage temperature range, T

stg

  – 65

°

C to 150

°

C

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 

260

°

C

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and

functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not

implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTE 1: All voltage values, except differential output voltage, VOD, are with respect to network GND. Currents into the device are positive and

currents out of the device are negative.

DISSIPATION RATING TABLE

PACKAGE

TA 

 25

°

C

POWER RATING

DERATING FACTOR

ABOVE TA = 25

°

C

TA = 70

°

C

POWER RATING

TA = 85

°

C

POWER RATING

TA = 125

°

C

POWER RATING

D

950 mW

7.6 mW/

°

C

608 mW

494 mW

N

1150 mW

9.2 mW/

°

C

736 mW

598 mW

J

1375 mW

11 mW/

°

C

275 mW

W

1000 mW

8.0 mW/

°

C

200 mW

recommended operating conditions

MIN

NOM

MAX

UNIT

Supply voltage, VCC

4.5

5

5.5

V

High-level input voltage, VIH

2

V

Low-level input voltage, VIL

0.8

V

Common-mode input voltage, VIC

±

7

V

High-level output current, IOH

– 6

mA

Low-level output current, IOL

6

mA

AM26C32C

0

70

Operating free-air temperature, TA

AM26C32I

– 40

85

°

C

AM26C32M

– 55

125

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AM26C32C, AM26C32I, AM26C32M

QUADRUPLE DIFFERENTIAL LINE RECEIVERS

 

 

SLLS104F – DECEMBER 1990 – REVISED APRIL 1998

5

POST OFFICE BOX 655303 

 DALLAS, TEXAS 75265

electrical characteristics over recommended ranges of V

CC

, V

IC

, and operating free-air

temperature (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP†

MAX

UNIT

VIT

Differential input high threshold voltage

VO = VOH min,

VIC = full range

0.2

V

VIT+

Differential input high-threshold voltage

O

OH

,

IOH = – 440 

µ

A

VIC = 0 to 5.5 V

0.1

V

VIT

Differential input low threshold voltage

VO = 0.45 V,

VIC = full range

– 0.2 ‡

V

VIT–

Differential input low-threshold voltage

O

,

IOL = 8 mA

VIC = 0 to 5.5 V

– 0.1 ‡

V

Vhys

Hysteresis voltage ( VIT+ – VIT–)

60

mV

VIK

Enable input clamp voltage

VCC = 4.5 V,

II = – 18 mA

– 1.5

V

VOH

High-level output voltage

VID = 200 mV,

IOH = – 6 mA

3.8

V

VOL

Low-level output voltage

VID = – 200 mV, IOL = 6 mA

0.2

0.3

V

IOZ

Off-state (high-impedance-state) output current

VO = VCC or GND

±

0.5

±

5

µ

A

II

Line input current

VI = 10 V,

Other input at 0 V

1.5

mA

II

Line input current

VI = – 10 V,

Other input at 0 V

– 2.5

mA

IIH

High-level enable current

VI = 2.7 V

20

µ

A

IIL

Low-level enable current

VI = 0.4 V

– 100

µ

A

ri

Input resistance

One input to ground

12

17

k

ICC

Supply current

VCC = 5.5 V

10

15

mA

† All typical values are at VCC = 5 V, VIC = 0, and TA = 25

°

C.

‡ The algebraic convention, in which the less positive (more negative) limit is designated minimum, is used in this data sheet for common-mode

input voltage.

switching characteristics over recommended ranges of operation conditions, C

L

 = 50 pF (unless

otherwise noted)

PARAMETER

TEST

CONDITIONS

AM26C32C

AM26C32I

AM26C32M

UNIT

CONDITIONS

MIN

TYP§

MAX

MIN

TYP§

MAX

tPLH

Propagation delay time, low- to high-level output

See Figure 1

9

17

27

9

17

27

ns

tPHL

Propagation delay time, high- to low-level output

See Figure 1

9

17

27

9

17

27

ns

tTLH

Output transition time, low- to high-level output

See Figure 1

4

9

4

10

ns

tTHL

Output transition time, high- to low-level output

See Figure 1

4

9

4

9

ns

tPZH

Output enable time to high level

See Figure 2

13

22

13

22

ns

tPZL

Output enable time to low level

See Figure 2

13

22

13

22

ns

tPHZ

Output disable time from high level

See Figure 2

13

22

13

26

ns

tPLZ

Output disable time from low level

See Figure 2

13

22

13

25

ns

§ All typical values are at VCC = 5 V, TA = 25

°

C.

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AM26C32C, AM26C32I, AM26C32M

QUADRUPLE DIFFERENTIAL LINE RECEIVERS

 

 

SLLS104F – DECEMBER 1990 – REVISED APRIL 1998

6

POST OFFICE BOX 655303 

 DALLAS, TEXAS 75265

PARAMETER MEASUREMENT INFORMATION

TEST CIRCUIT

VOLTAGE WAVEFORMS

0 V

Output

VOH

VOL

10%

90%

90%

10%

tTLH

tTHL

tPLH

tPHL

2.5 V

±

2.5 V

50%

Input

Device

Under

Test

A

B

VCC

CL = 50 pF

(see Note A)

Input

NOTE A: CL includes probe and jig capacitance.

Figure 1. Switching Test Circuit and Voltage Waveforms

TEST CIRCUIT

Device

Under

Test

G Input

G Input

VCC

S1

RL = 1 k

CL = 50 pF

(see Note A)

VID = 

±

2.5 V

VOLTAGE WAVEFORMS

tPZL, tPLZ Measurement: S1 to VCC

tPZH, tPHZ Measurement: S1 to GND

1.3 V

G

G

(see Note B)

Output

(with VID = 2.5 V)

Output

(with VID = – 2.5 V)

tPZH

tPHZ

tPZH

tPHZ

tPZL

tPLZ

tPZL

tPLZ

VOH – 0.5 V

VOL + 0.5 V

VOH – 0.5 V

VOL + 0.5 V

3 V

0 V

3 V

0 V

VOH

VOL

VOH

VOL

1.3 V

50%

50%

A Input

B Input

NOTES: A. CL includes probe and jig capacitance.

B. The input pulse is supplied by a generator having the following characteristics: PRR = 1 MHz, duty cycle 

 50%, tr = tf = 6 ns.

Figure 2. Enable/Disable Time Test Circuit and Output Voltage Waveforms

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any product or service without notice, and advise customers to obtain the latest version of relevant information

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subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those

pertaining to warranty, patent infringement, and limitation of liability.

TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in

accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent

TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily

performed, except those mandated by government requirements.

CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF

DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL

APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR

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BE FULLY AT THE CUSTOMER’S RISK.

In order to minimize risks associated with the customer’s applications, adequate design and operating

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TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent

that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other

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Copyright 

©

 1998, Texas Instruments Incorporated