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SN54HC4020, SN74HC4020

14-BIT ASYNCHRONOUS BINARY COUNTERS

 

 

SCLS158C – DECEMBER 1982 – REVISED FEBRUARY 2000

1

POST OFFICE BOX 655303 

 DALLAS, TEXAS 75265

D

Package Options Include Plastic

Small-Outline (D), Shrink Small-Outline

(DB), Thin Shrink Small-Outline (PW), and

Ceramic Flat (W) Packages, Ceramic Chip

Carriers (FK), and Standard Plastic (N) and

Ceramic (J) DIPs

 

description

These devices are 14-stage binary ripple-carry

counters that advance on the negative-going

edge of the clock pulse. The counters are reset to

zero (all outputs low) independently of the clock

(CLK) input when the clear (CLR) input goes high.

The SN54HC4020 is characterized for operation

over the full military temperature range of –55

°

C

to 125

°

C. The SN74HC4020 is characterized for

operation from –40

°

C to 85

°

C.

logic symbol

10

CLK

CT=0

11

CLR

9

0

7

3

5

4

4

† This symbol is in accordance with ANSI/IEEE Std 91-1984 and

IEC Publication 617-12.

RCTR14

Pin numbers shown are for the D, DB, J, N,

PW, and W packages.

6

13

12

14

15

1

2

3

13

QA

QD

QE

QF

QG

QH

QI

QJ

QK

QL

QM

QN

CT

Copyright 

©

 2000, Texas Instruments Incorporated

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

SN54HC4020 . . . J  OR  W  PACKAGE

SN74HC4020 . . . D, DB, N, OR PW PACKAGE 

(TOP VIEW)

SN54HC4020 . . . FK PACKAGE

(TOP VIEW)

NC – No internal connection

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

Q

L

Q

M

Q

N

Q

F

Q

E

Q

G

Q

D

GND

V

CC

Q

K

Q

J

Q

H

Q

I

CLR

CLK

Q

A

3

2 1 20 19

9 10 11 12 13

4

5

6

7

8

18

17

16

15

14

Q

J

Q

H

NC

Q

I

CLR

Q

N

Q

F

NC

Q

E

Q

G

Q

Q

NC

A

CLK

V

Q

D

GND

NC

CC

M

L

K

Q

Q

On products compliant to MIL-PRF-38535, all parameters are tested

unless otherwise noted. On all other products, production

processing does not necessarily include testing of all parameters.

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SN54HC4020, SN74HC4020

14-BIT ASYNCHRONOUS BINARY COUNTERS

 

 

SCLS158C – DECEMBER 1982 – REVISED FEBRUARY 2000

2

POST OFFICE BOX 655303 

 DALLAS, TEXAS 75265

logic diagram (positive logic)

Pin numbers shown are for the D, DB, J, N, PW, and W packages.

R

T

R

T

R

T

R

T

R

T

R

T

R

T

R

T

R

T

R

T

R

T

R

T

R

T

R

T

9

7

5

4

6

13

12

14

15

1

2

3

11

10

CLR

CLK

QA

QD

QE

QF

QI

QL

QM

QN

QG

QH

QJ

QK

absolute maximum ratings over operating free-air temperature range

Supply voltage range, V

CC

 

–0.5 V to 7 V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

Input clamp current, I

IK

 (V

I

 < 0 or V

I

 > V

CC

) (see Note 1) 

±

20 mA

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

Output clamp current, I

OK

 (V

O

 < 0 or V

O

 > V

CC

) (see Note 1) 

±

20 mA

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

Continuous output current, I

O

 (V

O

 = 0 to V

CC

±

25 mA

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

Continuous current through V

CC

 or GND 

±

50 mA

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

Package thermal impedance, 

θ

JA 

(see Note 2): D package 

73

°

C/W

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

DB package 

82

°

C/W

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

N package 

67

°

C/W

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

PW package 

108

°

C/W

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

Storage temperature range, T

stg

 –65

°

C to 150

°

C

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and

functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not

implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES:

1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

2. The package thermal impedance is calculated in accordance with JESD 51.

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SN54HC4020, SN74HC4020

14-BIT ASYNCHRONOUS BINARY COUNTERS

 

 

SCLS158C – DECEMBER 1982 – REVISED FEBRUARY 2000

3

POST OFFICE BOX 655303 

 DALLAS, TEXAS 75265

recommended operating conditions (see Note 3)

SN54HC4020

SN74HC4020

UNIT

MIN

NOM

MAX

MIN

NOM

MAX

UNIT

VCC

Supply voltage

2

5

6

2

5

6

V

VCC = 2 V

1.5

1.5

VIH

High-level input voltage

VCC = 4.5 V

3.15

3.15

V

VCC = 6 V

4.2

4.2

VCC = 2 V

0

0.5

0

0.5

VIL

Low-level input voltage

VCC = 4.5 V

0

1.35

0

1.35

V

VCC = 6 V

0

1.8

0

1.8

VI

Input voltage

0

VCC

0

VCC

V

VO

Output voltage

0

VCC

0

VCC

V

VCC = 2 V

0

1000

0

1000

tt

Input transition (rise and fall) time

VCC = 4.5 V

0

500

0

500

ns

VCC = 6 V

0

400

0

400

TA

Operating free-air temperature

–55

125

–40

85

°

C

NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,

Implications of Slow or Floating CMOS Inputs, literature number SCBA004.

electrical characteristics over recommended operating free-air temperature range (unless

otherwise noted)

PARAMETER

TEST CONDITIONS

VCC

TA = 25

°

C

SN54HC4020

SN74HC4020

UNIT

PARAMETER

TEST CONDITIONS

VCC

MIN

TYP

MAX

MIN

MAX

MIN

MAX

UNIT

2 V

1.9

1.998

1.9

1.9

IOH = –20 

µ

A

4.5 V

4.4

4.499

4.4

4.4

VOH

VI = VIH or VIL

6 V

5.9

5.999

5.9

5.9

V

IOH = –4 mA

4.5 V

3.98

4.3

3.7

3.84

IOH = –5.2 mA

6 V

5.48

5.8

5.2

5.34

2 V

0.002

0.1

0.1

0.1

IOL = 20 

µ

A

4.5 V

0.001

0.1

0.1

0.1

VOL

VI = VIH or VIL

6 V

0.001

0.1

0.1

0.1

V

IOL = 4 mA

4.5 V

0.17

0.26

0.4

0.33

IOL = 5.2 mA

6 V

0.15

0.26

0.4

0.33

II

VI = VCC or 0

6 V

±

0.1

±

100

±

1000

±

1000

nA

ICC

VI = VCC or 0,

IO = 0

6 V

8

160

80

µ

A

Ci

2 V to 6 V

3

10

10

10

pF

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SN54HC4020, SN74HC4020

14-BIT ASYNCHRONOUS BINARY COUNTERS

 

 

SCLS158C – DECEMBER 1982 – REVISED FEBRUARY 2000

4

POST OFFICE BOX 655303 

 DALLAS, TEXAS 75265

timing requirements over recommended operating free-air temperature range (unless otherwise

noted)

VCC

TA = 25

°

C

SN54HC4020

SN74HC4020

UNIT

VCC

MIN

MAX

MIN

MAX

MIN

MAX

UNIT

2 V

0

5.5

0

3.7

0

4.3

fclock

Clock frequency

4.5 V

0

28

0

19

0

22

MHz

6 V

0

33

0

22

0

25

2 V

90

135

115

CLK high or low

4.5 V

18

27

23

t

Pulse duration

6 V

15

23

20

ns

tw

Pulse duration

2 V

70

105

90

ns

CLR high

4.5 V

14

21

18

6 V

12

18

25

2 V

60

90

75

tsu

Setup time, CLR inactive before CLK

4.5 V

12

18

15

ns

6 V

10

15

13

switching characteristics over recommended operating free-air temperature range, C

L

 = 50 pF

(unless otherwise noted) (see Figure 1)

PARAMETER

FROM

TO

VCC

TA = 25

°

C

SN54HC4020

SN74HC4020

UNIT

PARAMETER

(INPUT)

(OUTPUT)

VCC

MIN

TYP

MAX

MIN

MAX

MIN

MAX

UNIT

2 V

5.5

10

3.7

4.3

fmax

4.5 V

28

45

19

22

MHz

6 V

33

53

22

25

2 V

62

150

225

190

tpd

CLK

QA

4.5 V

16

30

45

38

ns

6 V

12

26

38

32

2 V

63

140

210

175

tPHL

CLR

Any

4.5 V

17

28

42

35

ns

6 V

13

24

36

30

2 V

28

75

110

95

tt

Any

4.5 V

8

15

22

19

ns

6 V

6

13

19

16

operating characteristics, T

A

 = 25

°

C

PARAMETER

TEST CONDITIONS

TYP

UNIT

Cpd

Power dissipation capacitance

No load

88

pF

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SN54HC4020, SN74HC4020

14-BIT ASYNCHRONOUS BINARY COUNTERS

 

 

SCLS158C – DECEMBER 1982 – REVISED FEBRUARY 2000

5

POST OFFICE BOX 655303 

 DALLAS, TEXAS 75265

PARAMETER MEASUREMENT INFORMATION

VOLTAGE WAVEFORMS

SETUP AND INPUT RISE AND FALL TIMES

VOLTAGE WAVEFORMS

PULSE DURATIONS

tsu

50%

50%

50%

10%

10%

90%

90%

VCC

VCC

0 V

0 V

tr

tf

Reference

Input

Data

Input

50%

High-Level

Pulse

50%

VCC

0 V

50%

50%

VCC

0 V

tw

Low-Level

Pulse

VOLTAGE WAVEFORMS

PROPAGATION DELAY AND OUTPUT TRANSITION TIMES

50%

50%

50%

10%

10%

90%

90%

VCC

VOH

VOL

0 V

tr

tf

Input

In-Phase

Output

50%

tPLH

tPHL

50%

50%

10%

10%

90%

90%

VOH

VOL

tr

tf

tPHL

tPLH

Out-of-Phase

Output

Test

Point

From Output

Under Test

LOAD CIRCUIT

NOTES: A. CL includes probe and test-fixture capacitance.

B. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following

characteristics: PRR 

 1 MHz, ZO = 50 

, tr = 6 ns, tf = 6 ns.

C. For clock inputs, fmax is measured when the input duty cycle is 50%.

D. The outputs are measured one at a time with one input transition per measurement.

E. tPLH and tPHL are the same as tpd.

CL = 50 pF

(see Note A)

Figure 1. Load Circuit and Voltage Waveforms

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Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue

any product or service without notice, and advise customers to obtain the latest version of relevant information

to verify, before placing orders, that information being relied on is current and complete. All products are sold

subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those

pertaining to warranty, patent infringement, and limitation of liability.

TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in

accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent

TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily

performed, except those mandated by government requirements.

CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF

DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL

APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR

WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER

CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO

BE FULLY AT THE CUSTOMER’S RISK.

In order to minimize risks associated with the customer’s applications, adequate design and operating

safeguards must be provided by the customer to minimize inherent or procedural hazards.

TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent

that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other

intellectual property right of TI covering or relating to any combination, machine, or process in which such

semiconductor products or services might be or are used. TI’s publication of information regarding any third

party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.

Copyright 

©

 2000, Texas Instruments Incorporated